C8051F045-GQ Silicon Laboratories Inc, C8051F045-GQ Datasheet - Page 203
![IC 8051 MCU 64K FLASH 64TQFP](/photos/12/18/121883/c8051f045-gq_sml.jpg)
C8051F045-GQ
Manufacturer Part Number
C8051F045-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F045-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
On-chip Dac
2-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1210
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Quantity
Price
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Manufacturer:
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17. Port Input/Output
The C8051F04x family of devices are fully integrated mixed-signal System on a Chip MCUs with 64 digital
I/O pins (C8051F040/2/4/6) or 32 digital I/O pins (C8051F041/3/5/7), organized as 8-bit Ports. All ports are
both bit- and byte-addressable through their corresponding Port Data registers. All Port pins are 5 V-toler-
ant, and all support configurable Open-Drain or Push-Pull output modes and weak pullups. A block dia-
gram of the Port I/O cell is shown in Figure 17.1. Complete Electrical Specifications for the Port I/O pins
are given in Table 17.1.
Table 17.1. Port I/O DC Electrical Characteristics
V
Output High Voltage
(V
Output Low Voltage
(V
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Leakage Current
Input Capacitance
DD
OH
OL
PORT-INPUT
/WEAK-PULLUP
PUSH-PULL
/PORT-OUTENABLE
PORT-OUTPUT
ANALOG INPUT
= 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified.
)
)
Parameter
Analog Select
(Ports 1, 2, and 3)
I
I
I
I
I
I
DGND < Port Pin < V
Weak Pullup Off
Weak Pullup On
OH
OH
OH
OL
OL
OL
Figure 17.1. Port I/O Cell Block Diagram
= 8.5 mA
= 10 µA
= 25 mA
= –3 mA, Port I/O Push-Pull
= –10 µA, Port I/O Push-Pull
= –10 mA, Port I/O Push-Pull
Conditions
DD
Rev. 1.5
, Pin Tri-state
C8051F040/1/2/3/4/5/6/7
DGND
V
V
0.7 x V
VDD
DD
DD
Min
—
—
—
—
—
—
—
—
—
– 0.7
– 0.1
DD
V
DD
VDD
Typ
1.0
10
—
—
—
—
—
—
—
—
5
(WEAK)
– 0.8
0.3 x V
Max
0.6
0.1
± 1
—
—
—
—
—
—
—
—
DD
PORT
PAD
Units
µA
pF
V
V
203
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