R5F21276SNFP#U0 Renesas Electronics America, R5F21276SNFP#U0 Datasheet - Page 354
R5F21276SNFP#U0
Manufacturer Part Number
R5F21276SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Specifications of R5F21276SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 17.12
17.4.4
Timer RA
Timer RA
UART0 Complete transmission via UART0
Hardware LIN
Hardware LIN
Figure 17.12 shows an Example of Hardware LIN Communication Completion Flowchart.
Use the following timing for hardware LIN end processing:
• If the hardware bus collision detection function is used
• If the bus collision detection function is not used
Sep 26, 2008
Perform hardware LIN end processing after checksum transmission completes.
Perform hardware LIN end processing after header field transmission and reception complete.
Hardware LIN End Processing
Set the timer to stop counting
TSTART bit in TRACR register ← 0
Read the count status flag
TCSTF flag in TRACR register
Example of Hardware LIN Communication Completion Flowchart
Clear the status flags
(Bus collision detection, Synch Break
detection, Synch Field measurement)
Bits B2CLR, B1CLR, B0CLR in the LINST
register ← 0
Set the LIN operation to stop
LINE bit in the LINCR register ← 0
Page 335 of 453
TCSTF = 0 ?
YES
NO
Set the timer to stop counting.
Zero to one cycle of the timer
RA count source is required
after timer RA starts counting
before the TCSTF flag is set to
1.
When the bus collision
detection function is not used,
end processing for the UART0
transmission is not required.
After clearing hardware LIN
status flag, stop the hardware
LIN operation.
17. Hardware LIN
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