C8051F705-GQ Silicon Laboratories Inc, C8051F705-GQ Datasheet - Page 61
![IC 8051 MCU 15K FLASH 48-TQFP](/photos/12/17/121724/c8051f705-gq_sml.jpg)
C8051F705-GQ
Manufacturer Part Number
C8051F705-GQ
Description
IC 8051 MCU 15K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Specifications of C8051F705-GQ
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
15KB (15K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1613
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F705-GQ
Manufacturer:
TI/NSC
Quantity:
210
Company:
Part Number:
C8051F705-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F705-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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SFR Definition 10.4. ADC0CN: ADC0 Control
SFR Address = 0xE8; SFR Page = All Pages; Bit-Addressable
Name
Reset
Bit
2:0 AD0CM[2:0] ADC0 Start of Conversion Mode Select.
Type
7
6
5
4
3
Bit
AD0BUSY ADC0 Busy Bit.
AD0WINT
AD0INT
AD0EN
AD0TM
Name
AD0EN
R/W
7
0
ADC0 Enable Bit.
0: ADC0 Disabled. ADC0 is in low-power shutdown.
1: ADC0 Enabled. ADC0 is active and ready for data conversions.
ADC0 Track Mode Bit.
0: Normal Track Mode: When ADC0 is enabled, tracking is continuous unless a con-
version is in progress. Conversion begins immediately on start-of-conversion event,
as defined by AD0CM[2:0].
1: Delayed Track Mode: When ADC0 is enabled, input is tracked when a conversion
is not in progress. A start-of-conversion signal initiates three SAR clocks of additional
tracking, and then begins the conversion.
ADC0 Conversion Complete Interrupt Flag.
0: ADC0 has not completed a data conversion since AD0INT was last cleared.
1: ADC0 has completed a data conversion.
ADC0 Window Compare Interrupt Flag.
0: ADC0 Window Comparison Data match has not occurred since this flag was last
cleared.
1: ADC0 Window Comparison Data match has occurred.
000: ADC0 start-of-conversion source is write of 1 to AD0BUSY.
001: ADC0 start-of-conversion source is overflow of Timer 0.
010: ADC0 start-of-conversion source is overflow of Timer 2.
011: ADC0 start-of-conversion source is overflow of Timer 1.
100: ADC0 start-of-conversion source is rising edge of external CNVSTR.
101: ADC0 start-of-conversion source is overflow of Timer 3.
11x: Reserved.
AD0TM
R/W
6
0
AD0INT
R/W
5
0
AD0BUSY AD0WINT
R/W
Rev. 1.0
4
0
Read:
0: ADC0 conversion is not
in progress.
1: ADC0 conversion is in
progress.
Function
R/W
3
0
C8051F70x/71x
2
0
Write:
0: No Effect.
1: Initiates ADC0 Conver-
sion if AD0CM[2:0] =
000b
AD0CM[2:0]
R/W
1
0
0
0
61
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