MC9S08GT60ACFDER Freescale Semiconductor, MC9S08GT60ACFDER Datasheet - Page 103
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MC9S08GT60ACFDER
Manufacturer Part Number
MC9S08GT60ACFDER
Description
IC MCU 60K FLASH 4K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT60ACFDER.pdf
(302 pages)
Specifications of MC9S08GT60ACFDER
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
MC9S08GT60ACFDERTR
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Chapter 7
Internal Clock Generator (S08ICGV2)
The MC9S08GBxxA/GTxxA microcontroller provides one internal clock generation (ICG) module to
create the system bus frequency. All functions described in this section are available on the
MC9S08GBxxA/GTxxA microcontroller. The EXTAL and XTAL pins share port G bits 2 and 1,
respectively. Analog supply lines V
pins. Electrical parametric data for the ICG may be found in
Freescale Semiconductor
ICG
ICGLCLK*
ICGERCLK
FFE
Freescale Semiconductor recommends that flash location $FFBE be
reserved to store a nonvolatile version of ICGTRM. This will allow
debugger and programmer vendors to perform a manual trim operation and
store the resultant ICGTRM value for users to access at a later time.
ICGOUT
* ICGLCLK is the alternate BDC clock source for the MC9S08GBxxA/GTxxA.
CPU
÷
CONTROL
2
SYSTEM
LOGIC
÷
2
FIXED FREQ CLOCK (XCLK)
Figure 7-1. System Clock Distribution Diagram
RTI
BUSCLK
DDA
MC9S08GB60A Data Sheet, Rev. 2
and V
BDC
TPM1
SSA
NOTE
are internally derived from the MCU’s V
TPM2
Appendix A, “Electrical
ATD has min and max
frequency requirements. See
Chapter 1, “Device
Appendix A, “Electrical
IIC1
ATD1
SCI1
Overview” and
Characteristics.
RAM
SCI2
Characteristics.”
Flash has frequency
requirements for program
and erase operation.
See
Characteristics.
Appendix A, “Electrical
FLASH
DD
SPI1
and V
SS
103
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