MC9S08GT8ACFCE Freescale Semiconductor, MC9S08GT8ACFCE Datasheet - Page 92
![IC MCU 8K FLASH 1K RAM 32-QFN](/photos/12/16/121603/mc9s08gt8acfce_sml.jpg)
MC9S08GT8ACFCE
Manufacturer Part Number
MC9S08GT8ACFCE
Description
IC MCU 8K FLASH 1K RAM 32-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT8ACFBER.pdf
(300 pages)
Specifications of MC9S08GT8ACFCE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Parallel Input/Output
92
PTCDD[7:0]
PTCPE[7:0]
PTCSE[7:0]
Reset
Reset
Reset
Field
Field
Field
7:0
7:0
7:0
W
W
W
R
R
R
PTCDD7
PTCPE7
PTCSE7
Pullup Enable for Port C Bits — For port C pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port C pins that are configured as outputs, these bits are ignored and
the internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
Slew Rate Control Enable for Port C Bits — For port C pins that are outputs, these read/write control bits
determine whether the slew rate controlled outputs are enabled. For port B pins that are configured as inputs,
these bits are ignored.
0 Slew rate control disabled.
1 Slew rate control enabled.
Data Direction for Port C Bits — These read/write bits control the direction of port C pins and what is read for
PTCD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port C bit n and PTCD reads return the contents of PTCDn.
0
0
0
7
7
7
PTCDD6
PTCPE6
PTCSE6
Figure 6-18. Slew Rate Control Enable for Port C (PTCSE)
0
0
0
6
6
6
Figure 6-17. Pullup Enable for Port C (PTCPE)
Figure 6-19. Data Direction for Port C (PTCDD)
Table 6-12. PTCDD Field Descriptions
Table 6-10. PTCPE Field Descriptions
Table 6-11. PTCSE Field Descriptions
PTCDD5
MC9S08GT16A/GT8A Data Sheet, Rev. 1
PTCPE5
PTCSE5
0
0
0
5
5
5
PTCPE4
PTCSE4
PTCDD4
0
0
0
4
4
4
Description
Description
Description
PTCDD3
PTCPE3
PTCSE3
3
0
3
0
3
0
PTCDD2
PTCPE2
PTCSE2
0
0
0
2
2
2
PTCDD1
PTCPE1
PTCSE1
Freescale Semiconductor
0
0
0
1
1
1
PTCDD0
PTCPE0
PTCSE0
0
0
0
0
0
0
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