C8051F305-GS Silicon Laboratories Inc, C8051F305-GS Datasheet - Page 43

• Manufacturer Part Number: C8051F305-GS
• Description: IC 8051 MCU 2K FLASH 14-SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F305-GS

• Program Memory Type: FLASH
• Program Memory Size: 2KB (2K x 8)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SMBus/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F300DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1540-5

Bits7–3: AD0SC4–0: ADC0 SAR Conversion Clock Period Bits.
Bit2:
Bits1–0: AMP0GN1–0: ADC0 Internal Amplifier Gain (PGA).
Bits7–0: ADC0 Data Word.
AD0SC4
R/W
R/W
Bit7
Bit7
SFR Definition 5.2. ADC0CF: ADC0 Configuration (C8051F300/2)
SAR Conversion clock is derived from system clock by the following equation, where
AD0SC refers to the 5-bit value held in bits AD0SC4-0. SAR Conversion clock requirements
are given in Table 5.1.
UNUSED. Read = 0b; Write = don’t care.
00: Gain = 0.5
01: Gain = 1
10: Gain = 2
11: Gain = 4
ADC0 holds the output data byte from the last ADC0 conversion. When in Single-ended
mode, ADC0 holds an 8-bit unsigned integer. When in Differential mode, ADC0 holds a 2’s
complement signed 8-bit integer.
AD0SC
AD0SC3
SFR Definition 5.3. ADC0: ADC0 Data Word (C8051F300/2)
R/W
R/W
Bit6
Bit6
=
SYSCLK
--------------------- - 1
CLK
AD0SC2
R/W
R/W
Bit5
Bit5
SAR
–
AD0SC1
R/W
R/W
Bit4
Bit4
AD0SC0
Rev. 2.9
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
—
C8051F300/1/2/3/4/5
AMP0GN1 AMP0GN0 11111000
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
0xBE
0xBC
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