EZ80F91NAA50EG Zilog, EZ80F91NAA50EG Datasheet - Page 64

• Manufacturer Part Number: EZ80F91NAA50EG
• Description: IC ACCLAIM MCU 256KB 144BGA
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91NAA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LBGA
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG, eZ80F910200KITG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4565

Table 9. Port x Alternate Registers 0
(PA_ALT0 = 00A6h, PB_ALT0 = 00A7h, PC_ALT0 = 00CEh, PD_ALT0 = 00CFh)
Table 10. Port x Alternate Registers 1
(PA_ALT1 = 0098h, PB_ALT1 = 009Ch, PC_ALT1 = 00A0h, PD_ALT1 = 00A4h)
Table 11. Port x Alternate Registers 2
(PA_ALT2 = 0099h, PB_ALT2 = 009Dh, PC_ALT2 = 00A1h, PD_ALT2 = 00A5h)
PS027001-0707
Bit
Reset
CPU Access
Note: W = Write only
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Port x Alternate Register 0
The Port x Alternate register 0 is used to clear edge triggered interrupts. If an edge
triggered interrupt occurs, writing 1 to the corresponding bit of this register will clear it.
Port x Alternate Register 1
In conjunction with the other GPIO Control registers, the Port x Alternate Register 1 (see
Table
mode selection, see
Port x Alternate Register 2
In conjunction with the other GPIO Control registers, the Port x Alternate Register 2 (see
Table
mode selection, see
10) controls the operating modes of the GPIO port pins. For more details on GPIO
11) controls the operating modes of the GPIO port pins. For more details on GPIO
R/W
R/W
W
7
0
7
0
7
0
R/W
R/W
W
6
0
6
0
6
0
Table 6
Table 6
R/W
R/W
W
5
0
5
0
5
0
on page 50.
on page 50.
R/W
R/W
W
4
0
4
0
4
0
R/W
R/W
W
3
0
3
0
3
0
R/W
R/W
W
2
0
2
0
2
0
R/W
R/W
W
1
0
1
0
1
0
General Purpose Input/Output
Product Specification
R/W
R/W
W
0
0
0
0
0
0
eZ80F91 ASSP
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