EZ80F91AZ050EG Zilog, EZ80F91AZ050EG Datasheet - Page 100
EZ80F91AZ050EG
Manufacturer Part Number
EZ80F91AZ050EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91AZ050EG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3867
EZ80F91AZ050EG
EZ80F91AZ050EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PS019215-0910
Figure 20. Memory Interface Bus Operation During CPU Bus Cycles, Normal Operation
Figure 21. Memory Interface Bus Operation During Bus Acknowledge Cycles
During bus acknowledge cycles, the Memory and I/O chip select logic is controlled by the
external address bus and external IORQ and MREQ signals.
External
External
Master
Master
MREQ
MREQ
IORQ
IORQ
Chip Select
Chip Select
Wait State
Wait State
Generator
Generator
eZ80F91
eZ80F91
ADDRESS
ADDRESS
DATA
DATA
WAIT
WAIT
WR
WR
RD
RD
CS0
CS1
CS2
CS3
CS0
CS1
CS2
CS3
Chip Selects and Wait States
Peripheral
Peripheral
Product Specification
External
External
eZ80F91 MCU
91
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