ST72F324K4T6 STMicroelectronics, ST72F324K4T6 Datasheet - Page 53

• Manufacturer Part Number: ST72F324K4T6
• Description: MCU 8BIT 16K FLASH 5V 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 3.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-4851

WATCHDOG TIMER (Cont’d)
Figure 33. Exact Timeout Duration (t
WHERE:
t
t
t
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
To calculate the minimum Watchdog Timeout (t
IF
To calculate the maximum Watchdog Timeout (t
IF
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
min0
max0
OSC2
WDGCR Register (Hex.)
(MCCSR Reg.)
Value of T[5:0] Bits in
CNT
CNT
TB1 Bit
= (LSB + 128) x 64 x t
= 16384 x t
= 125ns if f
0
0
1
1
<
≤
MSB
-------------
MSB
-------------
3F
00
4
4
(MCCSR Reg.)
OSC2
OSC2
TB0 Bit
THEN
ELSE
THEN
ELSE
0
1
0
1
=8 MHz
Min. Watchdog
t max
Timeout (ms)
t min
OSC2
t max
t min
1.496
t
Selected MCCSR
128
min
=
=
=
=
t min0
t max0
Timebase
t min0
t max0
10ms
25ms
2ms
4ms
min
+
+
+
+
and t
16384
16384
16384
16384
Max. Watchdog
Timeout (ms)
max
128.552
×
×
2.048
t
×
×
max
⎛
⎝
CNT
MSB
)
⎛
⎝
min
CNT
CNT
max
20
49
CNT
4
8
):
):
×
×
–
–
t osc2
t osc2
LSB
4CNT
---------------- -
59
53
35
54
MSB
4CNT
---------------- -
MSB
⎞
⎠
⎞
⎠
+
+
(
(
192
192
+
+
LSB
LSB
ST72324Jx ST72324Kx
)
)
×
×
64
64
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
×
×
t osc2
t osc2
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