STM8S207C8T6 STMicroelectronics, STM8S207C8T6 Datasheet - Page 21
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STM8S207C8T6
Manufacturer Part Number
STM8S207C8T6
Description
MCU 8BIT 64K MEMORY 48-LQFP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet
1.STEVAL-MKI030V1.pdf
(105 pages)
Specifications of STM8S207C8T6
Mfg Application Notes
STM8S Getting Started
Core Processor
STM8
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
STM8
No. Of I/o's
38
Eeprom Memory Size
1.5KB
Ram Memory Size
4KB
Cpu Speed
24MHz
No. Of Timers
4
Rohs Compliant
Yes
Processor Series
STM8S20x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
CAN, 12C, SPI, UART
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
38
Number Of Timers
2
Operating Supply Voltage
2.95 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8951
STM8S207C8T6
STM8S207C8T6
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STM8S207xx, STM8S208xx
4.14.3
Asynchronous communication (UART mode)
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LIN master capability
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LIN slave mode
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SPI
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Full duplex communication - NRZ standard format (mark/space)
Programmable transmit and receive baud rates up to 1 Mbit/s (f
following any standard baud rate regardless of the input frequency
Separate enable bits for transmitter and receiver
Two receiver wakeup modes:
–
–
Transmission error detection with interrupt generation
Parity control
Emission: Generates 13-bit synch break frame
Reception: Detects 11-bit break frame
Autonomous header handling - one single interrupt per valid message header
Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %
Synch delimiter checking
11-bit LIN synch break detection - break detection always active
Parity check on the LIN identifier field
LIN error management
Hot plugging support
Maximum speed: 10 Mbit/s (f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave/master selection input pin
Address bit (MSB)
Idle line (interrupt)
Doc ID 14733 Rev 11
MASTER
/2) both for master and slave
CPU
/16) and capable of
Product overview
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