STM8S207C8T6 STMicroelectronics, STM8S207C8T6 Datasheet - Page 104
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STM8S207C8T6
Manufacturer Part Number
STM8S207C8T6
Description
MCU 8BIT 64K MEMORY 48-LQFP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet
1.STEVAL-MKI030V1.pdf
(105 pages)
Specifications of STM8S207C8T6
Mfg Application Notes
STM8S Getting Started
Core Processor
STM8
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
STM8
No. Of I/o's
38
Eeprom Memory Size
1.5KB
Ram Memory Size
4KB
Cpu Speed
24MHz
No. Of Timers
4
Rohs Compliant
Yes
Processor Series
STM8S20x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
CAN, 12C, SPI, UART
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
38
Number Of Timers
2
Operating Supply Voltage
2.95 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-10032 - EVAL KIT MOTOR CONTROL STM8S497-10031 - EVAL KIT TOUCH SENSING STM8S497-10592 - BOARD DAUGHTER FOR STM8S207/8497-10593 - KIT STARTER FOR STM8S207/8 SER497-8506 - BOARD EVAL FOR STM8S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8951
STM8S207C8T6
STM8S207C8T6
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Revision history
104/105
Table 58.
14-Sep-2010
22-Mar-2011
Date
Document revision history (continued)
Revision
10
11
Added part number STM8S208M8 to
Updated "reset state" of
table.
Added footnote
Table 9: General hardware register
values; updated the reset state values of RST_SR, CLK_SWCR,
CLK_HSITRIMR, CLK_SWIMCCR, IWDG_KR, and ADC_DRx
registers; added the reset values of the CAN paged registers.
Figure 36: Recommended reset pin
0.1 µF.
Figure 40: Typical application with I2C bus and timing
t
t
Table 1: Device
Table 2: STM8S20xxx performance line
STM8S207K8 device and changed the RAM value of all other
devices to 6 Kbytes.
Figure
pins 80, 64, 48, and 32 respectively.
Table 6: Pin
Table 9: General hardware register
register.
Section 10.3.7: Reset pin
rest network.
w(SCKH)
r(SCL)
Doc ID 14733 Rev 11
, and t
3,
, t
Figure
w(SCKL)
f(SCL)
description: updated note
4
summary: added STM8S207K8.
4,
, t
to
respectively.
r(SCK)
Figure
Table 6: Pin
Table 5: Legend/abbreviations for pinout
, and t
characteristics: added text regarding the
5, and
Changes
f(SCK)
description.
Figure
map: standardized all reset state
protection: replaced 0.01 µF with
map: removed I2C_PECR
replaced by t
STM8S207xx, STM8S208xx
Table 1: Device
3
features: added
7: removed TIM1_CH4 from
and added note 5.
w(SCLH)
diagram:
summary.
, t
w(SCLL)
,