Z8F0213PJ005SC Zilog, Z8F0213PJ005SC Datasheet - Page 116

IC ENCORE MCU FLASH 2K 28DIP

Z8F0213PJ005SC

Manufacturer Part Number
Z8F0213PJ005SC
Description
IC ENCORE MCU FLASH 2K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0213PJ005SC

Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-3461
Table 65. UART Status 1 Register (U0STAT1)
BITS
FIELD
RESET
R/W
ADDR
PS024314-0308
UART Status 1 Register
R
7
0
received and the UART Receive Data register has not been read. If the RDA bit is reset to
0, reading the UART Receive Data register clears this bit.
0 = No overrun error occurred
1 = An overrun error occurred
FE—Framing Error
This bit indicates that a framing error (no Stop bit following data reception) was detected.
Reading the UART Receive Data register clears this bit.
0 = No framing error occurred
1 = A framing error occurred
BRKD—Break Detect
This bit indicates that a break occurred. If the data bits, parity/multiprocessor bit, and Stop
bit(s) are all 0s this bit is set to 1. Reading the UART Receive Data register clears this bit.
0 = No break occurred
1 = A break occurred
TDRE—Transmitter Data Register Empty
This bit indicates that the UART Transmit Data register is empty and ready for additional
data. Writing to the UART Transmit Data register resets this bit.
0 = Do not write to the UART Transmit Data register
1 = The UART Transmit Data register is ready to receive an additional byte to be transmit-
ted
TXE—Transmitter Empty
This bit indicates that the transmit shift register is empty and character transmission is fin-
ished.
0 = Data is currently transmitting
1 = Transmission is complete
CTS—CTS signal
When this bit is read it returns the level of the CTS signal. This signal is active Low.
This register contains multiprocessor control and status bits.
R
6
0
R
5
0
Reserved
R
4
0
F44H
R/W
3
0
Universal Asynchronous Receiver/Transmitter
Z8 Encore! XP
R/W
2
0
Product Specification
NEWFRM
R
1
0
®
F0823 Series
MPRX
R
0
0
106

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