ST7FLIT19BY1B6 STMicroelectronics, ST7FLIT19BY1B6 Datasheet - Page 52

• Manufacturer Part Number: ST7FLIT19BY1B6
• Description: IC MCU 8BIT 4K FLASH 16DIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLIT19BY1B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: ST7FLIT1x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLIT1B-D/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• For Use With: 497-6232 - BOARD EVAL ST7LITE1B,STP5NK60Z497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5629-5

ST7LITE1xB
I/O PORTS (Cont’d)
Analog alternate function
Configure the I/O as floating input to use an ADC
input. The analog multiplexer (controlled by the
ADC registers) switches the analog voltage
present on the selected pin to the common analog
rail, connected to the ADC input.
Analog Recommendations
Do not change the voltage level or loading on any
I/O while conversion is in progress. Do not have
clocking pins located close to a selected analog
pin.
WARNING: The analog input voltage level must
be within the limits stated in the absolute maxi-
mum ratings.
10.3 I/O PORT IMPLEMENTATION
The hardware implementation on each I/O port de-
pends on the settings in the DDR and OR registers
and specific I/O port features such as ADC input or
open drain.
Switching these I/O ports from one state to anoth-
er should be done in a sequence that prevents un-
wanted side effects. Recommended safe transi-
tions are illustrated in
are potentially risky and should be avoided, since
they may present unwanted side-effects such as
spurious interrupt generation.
Figure 33. Interrupt I/O Port State Transitions
52/159
1
floating/pull-up
interrupt
INPUT
01
(reset state)
floating
INPUT
00
Figure
open-drain
OUTPUT
33. Other transitions
10
XX
= DDR, OR
OUTPUT
push-pull
11
10.4 UNUSED I/O PINS
Unused I/O pins must be connected to fixed volt-
age levels. Refer to
10.5 LOW POWER MODES
10.6 INTERRUPTS
The external interrupt event generates an interrupt
if the corresponding configuration is selected with
DDR and OR registers and if the I bit in the CC
register is cleared (RIM instruction).
Related Documentation
AN 970: SPI Communication between ST7 and
EEPROM
AN1045: S/W implementation of I2C bus master
AN1048: Software LCD driver
WAIT
HALT
External interrupt on
selected external
event
Mode
Interrupt Event
No effect on I/O ports. External interrupts
cause the device to exit from WAIT mode.
No effect on I/O ports. External interrupts
cause the device to exit from HALT mode.
Section
Event
Flag
-
Description
Control
Enable
DDRx
13.8.
ORx
Bit
from
Wait
Exit
Yes
from
Exit
Halt
Yes