Z8F011ASB020EG Zilog, Z8F011ASB020EG Datasheet - Page 183
Z8F011ASB020EG
Manufacturer Part Number
Z8F011ASB020EG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F011ASB020EG.pdf
(282 pages)
Specifications of Z8F011ASB020EG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F011Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
8
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
- 40 C
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-4010
Z8F011ASB020EG
Z8F011ASB020EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F011ASB020EG
Manufacturer:
Zilog
Quantity:
459
Part Number:
Z8F011ASB020EG
Manufacturer:
ZILOG
Quantity:
20 000
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PS022825-0908
Table 104. NVDS Read Time (Continued)
If NVDS read performance is critical to your software architecture, there are some things
you can do to optimize your code for speed, listed in order from most helpful to least
helpful:
Operation
Read (128 byte array)
Write (16 byte array)
Write (64 byte array)
Write (128 byte array)
Illegal Read
Illegal Write
•
•
Periodically refresh all addresses that are used. The optimal use of NVDS in terms of
speed is to rotate the writes evenly among all addresses planned to use, bringing all
reads closer to the minimum read time. Because the minimum read time is much less
than the write time, however, actual speed benefits are not always realized.
Use as few unique addresses as possible: this helps to optimize the impact of
refreshing as well as minimize the requirement for it.
Minimum
Latency
4973
4971
4984
883
43
31
Maximum
Latency
7609
5009
5013
5023
31
43
Z8 Encore! XP
Product Specification
Non-Volatile Data Storage
®
F082A Series
172
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