Z8F011ASB020EG Zilog, Z8F011ASB020EG Datasheet - Page 140
Z8F011ASB020EG
Manufacturer Part Number
Z8F011ASB020EG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F011ASB020EG.pdf
(282 pages)
Specifications of Z8F011ASB020EG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F011Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
8
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
- 40 C
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-4010
Z8F011ASB020EG
Z8F011ASB020EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F011ASB020EG
Manufacturer:
Zilog
Quantity:
459
Part Number:
Z8F011ASB020EG
Manufacturer:
ZILOG
Quantity:
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PS022825-0908
Input Buffer Stage
6. Add the gain correction factor to the original offset corrected value.
7. Shift the result to the right, using the sign bit determined in
Output Data
The following is the output format of the corrected ADC value.
The overflow bit in the corrected output indicates that the computed value was greater
than the maximum logical value (+1023) or less than the minimum logical value (-1024).
Unlike the hardware overflow bit, this is not a simple binary Flag. For a normal sample
(non-overflow), the sign and the overflow bit matches. If the sign bit and overflow bit do
not match, a computational overflow has occurred.
Many applications require the measurement of an input voltage source with a high output
impedance. This ADC provides a buffered input for such situations. The drawback of the
buffered input is a limitation of the input range. When using unity gain buffered mode, the
input signal must be prevented from coming too close to either V
on page 231 for details.
This condition applies only to the input voltage level (with respect to ground) of each dif-
ferential input signal. The actual differential input voltage magnitude may be less than 300
mV.
The input range of the unbuffered ADC swings from V
than 300 mV must use the unbuffered input mode. If these signals do not contain low out-
put impedances, they might require off-chip buffering.
Signals outside the allowable input range can be used without instability or device dam-
age. Any ADC readings made outside the input range are subject to greater inaccuracy
than specified.
+
=
detection of computational overflow.
s v b a 9 8 7 6
#5 MSB
#5 MSB
#1 MSB
#6 MSB
S->
MSB
#6 MSB
#5 LSB
#5 LSB
#1 LSB
#6 LSB
5 4 3 2 1 0 - -
#6 LSB
LSB
SS
Z8 Encore! XP
to V
DD
Step
SS
Product Specification
. Input signals smaller
Analog-to-Digital Converter
or V
1. This allows for the
DD
®
. See
F082A Series
Table 135
129
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