P87C554SBAA,512 NXP Semiconductors, P87C554SBAA,512 Datasheet - Page 54

IC 80C51 MCU 16K OTP 64-PLCC

P87C554SBAA,512

Manufacturer Part Number
P87C554SBAA,512
Description
IC 80C51 MCU 16K OTP 64-PLCC
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheets

Specifications of P87C554SBAA,512

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
40
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Cpu Family
87C
Device Core
80C51
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
I2C/UART
Total Internal Ram Size
512Byte
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
7-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1254-5
935263385512
P87C554SBAA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C554SBAA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
00D8
00D9
00DA
00DB
00A8
00B8
00DD
00BD
00D5
00C5
00C1
00E5
0031
00A0
0001
00C0
00C1
0018
0030
0038
0040
0048
0053
0052
0051
0050
2002 Mar 25
80C51 8-bit microcontroller – 12 clock operation
16K/512 OTP/RAM, 8 channel 10-bit A/D, I
capture/compare, high I/O
!********************************************************************************************************
! SI01 EQUATE LIST
!********************************************************************************************************
!********************************************************************************************************
! LOCATIONS OF THE SI01 SPECIAL FUNCTION REGISTERS
!********************************************************************************************************
S1CON
S1STA
S1DAT
S1ADR
IEN0
IP0
!********************************************************************************************************
! BIT LOCATIONS
!********************************************************************************************************
STA
SI01HP
!********************************************************************************************************
! IMMEDIATE DATA TO WRITE INTO REGISTER S1CON
!********************************************************************************************************
ENS1_NOTSTA_STO_NOTSI_AA_CR0
ENS1_NOTSTA_NOTSTO_NOTSI_AA_CR0
ENS1_NOTSTA_NOTSTO_NOTSI_NOTAA_CR0
ENS1_STA_NOTSTO_NOTSI_AA_CR0
!********************************************************************************************************
! GENERAL IMMEDIATE DATA
!********************************************************************************************************
OWNSLA –0x31
ENSI01
PAG1
SLAW
SLAR
SELRB3
!********************************************************************************************************
! LOCATIONS IN DATA RAM
!********************************************************************************************************
MTD
MRD
SRD
STD
BACKUP
NUMBYTMST
SLA
HADD
–0xd8
–0xd9
–0xda
–0xdb
–0xa8
–02b8
–0xdd
–0xbd
–0xa0
–0x01
–0xc0
–0xc1
–0x18
–0x30
–0x38
–0x40
–0x48
–0x53
–0x52
–0x51
–0x50
2
C, PWM,
52
! STA bit in S1CON
! IP0, SI01 Priority bit
–0xd5
–0xc5
–0xc1
–0xe5
! Own SLA+General Call
! must be written into S1ADR
! EA+ES1, enable SIO1 interrupt
! must be written into IEN0
! select PAG1 as HADD
! SLA+W to be transmitted
! SLA+R to be transmitted
! Select Register Bank 3
! MST/TRX/DATA base address
! MST/REC/DATA base address
! SLV/REC/DATA base address
! SLV/TRX/DATA base address
! Backup from NUMBYTMST
! To restore NUMBYTMST in case
! of an Arbitration Loss.
! Number of bytes to transmit
! or receive as MST.
! Contains SLA+R/W to be
! transmitted.
! High Address byte for STATE 0
! till STATE 25.
! Generates STOP
! (CR0 = 100kHz)
! Releases BUS and
! ACK
! Releases BUS and
! NOT ACK
! Releases BUS and
! set STA
P87C554
Product data

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