LPC2124FBD64/01,15 NXP Semiconductors, LPC2124FBD64/01,15 Datasheet - Page 11

• Manufacturer Part Number: LPC2124FBD64/01,15
• Description: IC ARM7 MCU FLASH 256K 64-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2124FBD64/01,15

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 64-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 46
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/JTAG/SPI/SSP/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2100 - BOARD EVAL NXP LPC211X/LPC212X622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4314; 935284887151; LPC2124FBD64/01-S; LPC2124FBD64/01-S

NXP Semiconductors
LPC2114_2124_6
Product data sheet
6.3 On-chip static RAM
6.4 Memory map
However, the ISP flash erase command can be executed at any time (no matter whether
the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user flash.
With the CRP off, full access to the chip via the JTAG and/or ISP is restored.
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2114/2124 provide 16 kB of static RAM.
The LPC2114/2124 memory maps incorporate several distinct regions, as shown in
Figure
In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either
flash memory (the default) or on-chip static RAM. This is described in
“System
3.
control”.
Rev. 06 — 10 December 2007
Single-chip 16/32-bit microcontrollers
LPC2114/2124
Section 6.17
© NXP B.V. 2007. All rights reserved.
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