PXAG30KBA,512 NXP Semiconductors, PXAG30KBA,512 Datasheet - Page 30
![IC XA MCU 16BIT ROMLESS 44-PLCC](/photos/6/98/69845/568-44-plcc_sot187-2_sml.jpg)
PXAG30KBA,512
Manufacturer Part Number
PXAG30KBA,512
Description
IC XA MCU 16BIT ROMLESS 44-PLCC
Manufacturer
NXP Semiconductors
Series
XAr
Datasheet
1.PXAG30KBBD157.pdf
(36 pages)
Specifications of PXAG30KBA,512
Core Processor
XA
Core Size
16-Bit
Speed
30MHz
Connectivity
UART/USART
Peripherals
PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Processor Series
PXAG3x
Core
80C51
Data Bus Width
16 bit
Data Ram Size
512 B
Interface Type
UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
568-4340-5
935270580512
PXAG30KBA
PXAG30KBA
935270580512
PXAG30KBA
PXAG30KBA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PXAG30KBA,512
Manufacturer:
NXP
Quantity:
800
Company:
Part Number:
PXAG30KBA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
2002 Mar 25
XA 16-bit microcontroller family
512 B RAM, watchdog, 2 UARTs
CLOCK SIGNAL
Figure 25. I
(NC)
All other pins are disconnected
DD
RST
XTAL2
XTAL1
V
SS
Test Condition, Active Mode
V
NOTE:
For timing purposes, a port is no longer floating when a 100mV change from load voltage occurs,
and begins to float when a 100mV change from the loaded V
LOAD
AC inputs during testing are driven at V
NOTE:
Timing measurements are made at the 50% point of transitions.
V
DD
0.45V
V
V
V
–0.5
LOAD
LOAD
DD
0.45V
V
–0.5
EA
DD
SU00591B
–0.1V
+0.1V
V
Figure 23. AC Testing Input/Output
DD
Figure 22. External Clock Drive
Figure 24. Float Waveform
0.2V
t
CHCL
0.7V
DD
DD
0.2V
0.2V
–0.1
DD
REFERENCE
DD
DD
–0.5 for a logic ‘1’ and 0.45V for a logic ‘0’.
TIMING
POINTS
+0.9
–0.1
28
t
CLCX
CLOCK SIGNAL
OH
/V
t
C
OL
t
CHCX
level occurs. I
t
CLCH
Figure 26. I
(NC)
V
V
SU00842
All other pins are disconnected
OH
OL
V
SU00703A
+0.1V
OH
DD
–0.1V
/I
OL
DD
RST
XTAL2
XTAL1
V
SU00011
SS
20mA.
Test Condition, Idle Mode
V
EA
DD
SU00590B
XA-G30
V
DD
Product data