AT91SAM9G20B-CU Atmel, AT91SAM9G20B-CU Datasheet - Page 17

• Manufacturer Part Number: AT91SAM9G20B-CU
• Description: IC ARM9 MPU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G20B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, ISI, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, I2S, SPI, UART, USART
• Maximum Clock Frequency: 400 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 7
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9G20-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 96
• Ram Memory Size: 96KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G20-EK - KIT EVAL FOR AT91SAM9G20 MCUAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: AT91SAM9G20-CU; AT91SAM9G20-CU

7.2.3
7.3
6384DS–ATARM–13-Jan-10
Peripheral DMA Controller
Masters to Slaves Access
All the Masters can normally access all the Slaves. However, some paths do not make sense,
like as example allowing access from the Ethernet MAC to the Internal Peripherals. Thus, these
paths are forbidden or simply not wired, and shown “-” in
Table 7-3.
The Peripheral DMA Controller handles transfer requests from the channel according to the fol-
lowing priorities (Low to High priorities):
• Acting as one Matrix Master
• Allows data transfers from/to peripheral to/from any memory space without any intervention
• Next Pointer Support, forbids strong real-time constraints on buffer management.
• Twenty-four channels
2
3
4
0
1
of the processor.
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Synchronous Controller
– Two for each Serial Peripheral Interface
– One for Multimedia Card Interface
– One for Analog-to-Digital Converter
– Two for the Two-wire Interface
– TWI Transmit Channel
– DBGU Transmit Channel
– USART5 Transmit Channel
– USART4 Transmit Channel
– USART3 Transmit Channel
– USART2 Transmit Channel
– USART1 Transmit Channel
– USART0 Transmit Channel
– SPI1 Transmit Channel
External Bus Interface
UHP User Interface
Internal Peripherals
Internal SRAM
Internal SRAM
Internal ROM
Master
Slave
16 Kbytes
16 Kbytes
AT91SAM9G20 Masters to Slaves Access
Instruction &
ARM926
0 & 1
Data
X
X
X
X
X
X
Peripheral
Controller
AT91SAM9G20 Summary
DMA
X
X
X
X
X
2
X
Table
Controller
ISI
X
X
X
3
-
-
-
7-3.
Ethernet
MAC
X
X
X
4
-
-
-
USB Host
Controller
X
X
X
5
-
-
-
17