ATMEGA2560V-8CU Atmel, ATMEGA2560V-8CU Datasheet - Page 39
ATMEGA2560V-8CU
Manufacturer Part Number
ATMEGA2560V-8CU
Description
IC MCU AVR 256K FLASH 100-CBGA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2560V-8CU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Operating Supply Voltage
1.8 V to 5.5 V
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2560V-8CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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2549M–AVR–09/10
• Bit 7– XMBK: External Memory Bus-keeper Enable
Writing XMBK to one enables the bus keeper on the AD7:0 lines. When the bus keeper is
enabled, AD7:0 will keep the last driven value on the lines even if the XMEM interface has tri-
stated the lines. Writing XMBK to zero disables the bus keeper. XMBK is not qualified with SRE,
so even if the XMEM interface is disabled, the bus keepers are still activated as long as XMBK is
one.
• Bit 6:3 – Res: Reserved Bits
These bits are reserved and will always read as zero. When writing to this address location,
write these bits to zero for compatibility with future devices.
• Bit 2:0 – XMM2, XMM1, XMM0: External Memory High Mask
When the External Memory is enabled, all Port C pins are default used for the high address byte.
If the full 60 Kbytes address space is not required to access the External Memory, some, or all,
Port C pins can be released for normal Port Pin function as described in
in
XMMn bits to access all 64 Kbytes locations of the External Memory.
Table 8-4.
XMM2
“Using all 64 Kbytes Locations of External Memory” on page
0
0
0
0
1
1
1
1
XMM1
0
0
1
1
0
0
1
1
Port C Pins Released as Normal Port Pins when the External Memory is Enabled
XMM0
0
1
0
1
0
1
0
1
# Bits for External Memory Address
ATmega640/1280/1281/2560/2561
8 (Full 56 Kbytes space)
No Address high bits
7
6
5
4
3
2
33, it is possible to use the
Released Port Pins
Table
PC7 - PC6
PC7 - PC5
PC7 - PC4
PC7 - PC3
PC7 - PC2
Full Port C
8-4. As described
None
PC7
39
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