DSPIC30F6010A-30I/PF Microchip Technology, DSPIC30F6010A-30I/PF Datasheet - Page 4

• Manufacturer Part Number: DSPIC30F6010A-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 4.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F Family Reference Manual
Register 35-1:
DS70272B-page 35-4
Upper Byte:
bit 15
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-2
bit 1
bit 0
SPIEN
R/W-0
SPIEN: SPI1 Enable bit
1 = Enables the module and configures SCK1, SDO1, SDI1 and SS1 as serial port pins
0 = Disables the module
Unimplemented: Read as ‘0’
SPISIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
SPIROV: Receive Overflow Flag bit
1 = A new byte/word was completely received and discarded. The user application has not read the
0 = No overflow has occurred
Unimplemented: Read as ‘0’
SPITBF: SPI1 Transmit Buffer Full Status bit
1 = Transmit has not yet started; SPI1TXB is full
0 = Transmit has started; SPI1TXB is empty
Automatically set in hardware when the CPU writes SPI1BUF location, loading SPI1TXB.
Automatically cleared in hardware when the SPI1 module transfers data from SPI1TXB to SPI1SR.
SPIRBF: SPI1 Receive Buffer Full Status bit
1 = Receive is complete; SPI1RXB is full
0 = Receive is not complete; SPI1RXB is empty
Automatically set in hardware when the SPI1 module transfers data from SPI1SR to SPI1RXB.
Automatically cleared in hardware when the core reads SPI1BUF location, reading SPI1RXB.
Legend:
R = Readable bit
-n = Value at POR
previous data in the SPI1BUF register.
U-0
—
SPI1STAT: SPI1 Status and Control Register
Lower Byte:
bit 7
U-0
—
SPISIDL
R/W-0
SPIROV
R/C-0
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
U-0
—
U-0
—
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
U-0
—
U-0
—
U-0
—
U-0
—
© 2008 Microchip Technology Inc.
U-0
—
x = Bit is unknown
bit 8
SPITBF
R-0
SPIRBF
R-0
bit 0