PIC18F6621-I/PT Microchip Technology, PIC18F6621-I/PT Datasheet - Page 6

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6621-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 53
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.75KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details

PIC18F6X2X/8X2X
2.4
Figure 2-6 shows the high level overview of the pro-
gramming process. First, a bulk erase is performed.
Next, the code memory, ID locations, and data
EEPROM are programmed. These memories are then
verified to ensure that programming was successful. If
no errors are detected, the configuration bits are then
programmed and verified.
2.5
The High Voltage ICSP Program/Verify mode is
entered by holding PGC and PGD low and then raising
MCLR/V
the code memory, data EEPROM, ID locations, and
configuration bits can be accessed and programmed in
serial fashion.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
2.5.1
When the LVP configuration bit is ‘1’ (see Section 5.3),
the Low Voltage ICSP mode is enabled. Low Voltage
ICSP Program/Verify mode is entered by holding PGC
and PGD low, placing a logic high on PGM, and then
raising MCLR/V
pin is dedicated to the programming function and
ceases to be a general purpose I/O pin.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 2-5:
DS30499B-page 6
MCLR/V
V
PGD
PGC
DD
PP
High Level Overview of the
Programming Process
Entering High Voltage ICSP
Program/Verify Mode
D110
to V
ENTERING LOW VOLTAGE ICSP
PROGRAM/VERIFY MODE
PP
IHH
PP
to V
(high voltage). Once in this mode,
PGD = Input
P13
ENTERING HIGH VOLTAGE
PROGRAM/VERIFY MODE
P1
IH
. In this mode, the RB5/PGM
P12
FIGURE 2-6:
FIGURE 2-7:
MCLR/V
PGM
PGD
PGC
V
DD
PP
V
IH
Configuration Bits
Program Memory
Configuration Bits
Verify Program
V
Program Data
Perform Bulk
Program IDs
PGD = Input
IH
Verify Data
P15
Verify IDs
HIGH LEVEL
PROGRAMMING FLOW
Program
ENTERING LOW VOLTAGE
PROGRAM/ VERIFY MODE
Erase
Verify
 2003 Microchip Technology Inc.
Done
Start
P12