PIC16C74A-20/P Microchip Technology, PIC16C74A-20/P Datasheet - Page 15

• Manufacturer Part Number: PIC16C74A-20/P
• Description: IC MCU OTP 4KX14 A/D PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C74A-20/P

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 33
• Interface Type: I2C/SPI/USART
• On-chip Adc: 8-chx8-bit
• Number Of Timers: 3
• Core: PIC
• Processor Series: PIC16C
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 192 B
• Data Rom Size: 192 B
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Height: 3.81 mm
• Length: 52.26 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 6 V
• Supply Voltage (min): 4 V
• Width: 13.84 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.0
4.1
The PIC16C63A/65B/73B/74B has a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. All devices covered by this data sheet
have 4K x 14 bits of program memory. The address
range is 0000h - 0FFFh for all devices.
Accessing a location above 0FFFh will cause a wrap-
around.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 4-1:
2000 Microchip Technology Inc.
CALL,RETURN
RETFIE,RETLW
MEMORY ORGANIZATION
Program Memory Organization
On-chip Program
Memory (Page 0)
On-chip Program
Memory (Page 1)
Interrupt Vector
Stack Level 1
Stack Level 8
RESET Vector
PC<12:0>
PIC16C63A/65B/73B/74B
PROGRAM MEMORY MAP
AND STACK
13
0000h
0004h
0005h
07FFh
0800h
0FFFh
1000h
1FFFh
PIC16C63A/65B/73B/74B
4.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers (GPR)
and the Special Function Registers (SFR). Bits RP1
and RP0 are the bank select bits.
RP1:RP0 (STATUS<6:5>)
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the SFRs.
Above the SFRs are GPRs, implemented as static
RAM.
All implemented banks contain SFRs. Frequently used
SFRs from one bank may be mirrored in another bank
for code reduction and quicker access.
4.2.1
The register file can be accessed either directly, or indi-
rectly, through the File Select Register (FSR)
(Section 4.5).
= 00
= 01
= 10
= 11
Note:
Bank0
Bank1
Bank2
Bank3
Data Memory Organization
Maintain the IRP and RP1 bits clear in
these devices.
GENERAL PURPOSE REGISTER
FILE
DS30605C-page 15