PIC17C42A-25/P Microchip Technology, PIC17C42A-25/P Datasheet - Page 127
![IC MCU OTP 2KX16 PWM 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC17C42A-25/P
Manufacturer Part Number
PIC17C42A-25/P
Description
IC MCU OTP 2KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C42A-16P.pdf
(4 pages)
Specifications of PIC17C42A-25/P
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
4KB (2K x 16)
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
232 B
Interface Type
SCI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
For Use With
DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C42A-25/P
Manufacturer:
MICROCLOCK
Quantity:
20 000
Company:
Part Number:
PIC17C42A-25/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC17C42A-25/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 127 of 241
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Q Cycle Activity:
MOVLR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
1996 Microchip Technology Inc.
Note:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
This instruction is not available in the
PIC17C42 device.
Read literal
Move Literal to high nibble in
BSR
[ label ]
0
k
The 4-bit literal 'k' is loaded into the
most significant 4-bits of the Bank
Select Register (BSR). Only the high
4-bits of the Bank Select Register
are affected. The lower half of the
BSR is unchanged. The assembler
will encode the “u” fields as 0.
1
1
MOVLR
None
'k:u'
1011
Q2
=
=
k
(BSR<7:4>)
15
0x22
0x52
5
MOVLR k
101x
Execute
Q3
kkkk
literal 'k' to
BSR<7:4>
Write
Q4
uuuu
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
After Instruction
Decode
WREG
Q1
=
Move Literal to WREG
[ label ]
0
k
None
The eight bit literal 'k' is loaded into
WREG.
1
1
MOVLW
literal 'k'
Read
1011
Q2
0x5A
k
(WREG)
255
PIC17C4X
MOVLW k
0000
0x5A
Execute
Q3
DS30412C-page 127
kkkk
Write to
WREG
Q4
kkkk
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