DSPIC33FJ64GS610-I/PT Microchip Technology, DSPIC33FJ64GS610-I/PT Datasheet - Page 341
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DSPIC33FJ64GS610-I/PT
Manufacturer Part Number
DSPIC33FJ64GS610-I/PT
Description
IC MCU/DSP 64KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64GS610-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
Number Of I /o
85
Ram Size
9K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
85
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
On-chip Dac
10 bit, 4 Channel
Core Frequency
40MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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25.0
The dsPIC33F instruction set is identical to that of the
dsPIC30F.
Most instructions are a single program memory word
(24 bits). Only three instructions require two program
memory locations.
Each single-word instruction is a 24-bit word, divided
into an 8-bit opcode, which specifies the instruction
type and one or more operands, which further specify
the operation of the instruction.
The instruction set is highly orthogonal and is grouped
into five basic categories:
• Word or byte-oriented operations
• Bit-oriented operations
• Literal operations
• DSP operations
• Control operations
Table 25-1 shows the general symbols used in
describing the instructions.
The dsPIC33F instruction set summary in Table 25-2
lists all the instructions, along with the status flags
affected by each instruction.
Most word or byte-oriented W register instructions
(including
operands:
• The first source operand, which is typically a
• The second source operand, which is typically a
• The destination of the result, which is typically a
However, word or byte-oriented file register instructions
have two operands:
• The file register specified by the value, ‘f’
• The destination, which could be either the file
2010 Microchip Technology Inc.
Note:
register ‘Wb’ without any address modifier
register ‘Ws’ with or without an address modifier
register ‘Wd’ with or without an address modifier
register, ‘f’, or the W0 register, which is denoted
as ‘WREG’
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
INSTRUCTION SET SUMMARY
This data sheet summarizes the features
of the dsPIC33FJ32GS406/606/608/610
and
devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the “dsPIC33F/PIC24H
Family Reference Manual”. Please see
the
(www.microchip.com)
“dsPIC33F/PIC24H
Manual” sections.
barrel
dsPIC33FJ64GS406/606/608/610
shift
Microchip
instructions)
Family
for
web
have
the
Reference
latest
three
site
Preliminary
To
Most
rotate/shift instructions) have two operands:
• The W register (with or without an address
• The bit in the W register or file register
The literal instructions that involve data movement can
use some of the following operands:
• A literal value to be loaded into a W register or file
• The W register or file register where the literal
However, literal instructions that involve arithmetic or
logical operations use some of the following operands:
• The first source operand, which is a register ‘Wb’
• The second source operand, which is a literal
• The destination of the result (only if not the same
The MAC class of DSP instructions can use some of the
following operands:
• The accumulator (A or B) to be used (required
• The W registers to be used as the two operands
• The X and Y address space prefetch operations
• The X and Y address space prefetch destinations
• The accumulator write-back destination
The other DSP instructions do not involve any
multiplication and can include:
• The accumulator to be used (required)
• The source or destination operand (designated as
• The amount of shift specified by a W register,
The control instructions can use some of the following
operands:
• A program memory address
• The mode of the table read and table write
modifier) or file register (specified by the value of
‘Ws’ or ‘f’)
(specified by a literal value or indirectly by the
contents of register ‘Wb’)
register (specified by ‘k’)
value is to be loaded (specified by ‘Wb’ or ‘f’)
without any address modifier
value
as the first source operand), which is typically a
register ‘Wd’ with or without an address modifier
operand)
Wso or Wdo, respectively) with or without an
address modifier
‘Wn’, or a literal value
instructions
bit-oriented
instructions
DS70591C-page 341
(including
simple
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