PIC32MX360F256L-80I/PT Microchip Technology, PIC32MX360F256L-80I/PT Datasheet - Page 328

• Manufacturer Part Number: PIC32MX360F256L-80I/PT
• Description: IC PIC MCU FLASH 256K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F256L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX FAMILY
EXAMPLE 12-1:
EXAMPLE 12-2:
DS61143B - page 326
Note:
/*
*/
/*
*/
void __ISR(_CHANGE_NOTICE_VECTOR, ipl3) CN_Interrupt_ISR(void)
{
}
The following code example illustrates a Change Notice
interrupt configuration for pins CN1(PORTC), CN4(PORTB) and CN18(PORTF).
unsigned int value;
/* NOTE: disable vector interrupts prior to configuration */
CNCON = 0x8000;
CNEN=
CNPUE= 0x00040012;
/* read port(s) to clear mismatch on change notice pins */
value = PORTB;
value = PORTC;
value = PORTF;
IPS6SET = 0x00140000; // Set priority level=5
IPS6SET = 0x00030000; // Set subpriority level=3
IFS1CLR
IEC1SET
/* re-enable vector interrupts after configuration */
The following code example demonstrates a simple interrupt service
routine for CN interrupts. The user’s code at this vector should perform
any application specific operations and must read the CN corresponding
PORT registers to clear the mismatch conditions.
Finally, the CN interrupt status flag must be cleared before exiting.
unsigned int value;
value = PORTB
value = PORTC
... perform application specific operations in response to the interrupt
IFS1CLR
The CN ISR code example shows MPLAB® C32 C compiler-specific syntax. Refer to your compiler manual
regarding support for ISRs.
0x00040012;
= 0x0001;
= 0x0001;
= 0x0001;
CN CONFIGURATION AND INTERRUPT INITIALIZATION EXAMPLE CODE
CN ISR EXAMPLE CODE
// Enable Change Notice module
// Enable CN1, CN4 and CN18 pins
// Enable weak pull ups for CN1, CN4 and CN18 pins
// Could have also done this in single
// operation by assigning IPS6SET = 0x00170000
// Clear the interrupt flag status bit
// Enable Change Notice interrupts
// Read PORTB to clear CN4 mismatch condition
// Read PORTC to clear CN1,CN0 mismatch condition
// Be sure to clear the CN interrupt status
// flag before exiting the service routine.
Advance Information
© 2008 Microchip Technology Inc.