PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 70
![IC MCU FLASH 16KX16 EE 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F452-I/P
Manufacturer Part Number
PIC18F452-I/P
Description
IC MCU FLASH 16KX16 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
8.PIC18F452-EP.pdf
(332 pages)
Specifications of PIC18F452-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC18F452I/P
Q1176145
Q1176145
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F452-I/P
Manufacturer:
NXP
Quantity:
650
Company:
Part Number:
PIC18F452-I/P
Manufacturer:
MICROCHI
Quantity:
100
Company:
Part Number:
PIC18F452-I/P
Manufacturer:
MIC
Quantity:
11 200
Company:
Part Number:
PIC18F452-I/P
Manufacturer:
MICROCHIP
Quantity:
18
Part Number:
PIC18F452-I/P
Manufacturer:
MIC
Quantity:
20 000
Company:
Part Number:
PIC18F452-I/PT
Manufacturer:
EPSON
Quantity:
100
Company:
Part Number:
PIC18F452-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F452-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
PIC18FXX2
6.5
Depending on the application, good programming
practice may dictate that the value written to the mem-
ory should be verified against the original value. This
should be used in applications where excessive writes
can stress bits near the specification limit.
6.6
There are conditions when the device may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built-in. On power-up, the WREN bit is cleared.
Also, the Power-up Timer (72 ms duration) prevents
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch, or software malfunction.
EXAMPLE 6-3:
DS39564B-page 68
Loop
Write Verify
Protection Against Spurious Write
clrf
bcf
bcf
bcf
bsf
bsf
movlw
movwf
movlw
movwf
bsf
btfsc
bra
incfsz EEADR,F
bra
bcf
bsf
EEADR
EECON1,CFGS
EECON1,EEPGD
INTCON,GIE
EECON1,WREN
EECON1,RD
55h
EECON2
AAh
EECON2
EECON1,WR
EECON1,WR
$-2
Loop
EECON1,WREN
INTCON,GIE
DATA EEPROM REFRESH ROUTINE
; Start at address 0
; Set for memory
; Set for Data EEPROM
; Disable interrupts
; Enable writes
; Loop to refresh array
; Read current address
;
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; Wait for write to complete
; Increment address
; Not zero, do it again
; Disable writes
; Enable interrupts
6.7
Data EEPROM memory has its own code protect
mechanism. External Read and Write operations are
disabled if either of these mechanisms are enabled.
The microcontroller itself can both read and write to the
internal Data EEPROM, regardless of the state of the
code protect configuration bit. Refer to “Special Features
of the CPU” (Section 19.0) for additional information.
6.8
The data EEPROM is a high endurance, byte address-
able array that has been optimized for the storage of
frequently changing information (e.g., program vari-
ables or other data that are updated often). Frequently
changing values will typically be updated more often
than specification D124. If this is not the case, an array
refresh must be performed. For this reason, variables
that change infrequently (such as constants, IDs, cali-
bration, etc.) should be stored in FLASH program
memory.
A simple data EEPROM refresh routine is shown in
Example 6-3.
Note:
Operation During Code Protect
Using the Data EEPROM
If data EEPROM is only used to store con-
stants and/or data that changes rarely, an
array refresh is likely not required. See
specification D124.
2002 Microchip Technology Inc.