ATMEGA1284P-AU Atmel, ATMEGA1284P-AU Datasheet - Page 299

• Manufacturer Part Number: ATMEGA1284P-AU
• Description: MCU AVR 128K ISP FLASH 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1284P-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 44TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Rom Size: 4 KB
• Height: 1.05 mm
• Length: 10.1 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 10.1 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.7.5
8059D–AVR–11/09
Programming the EEPROM
K. End Page Programming
1. 1. Set XA1, XA0 to “10”. This enables command loading.
2. Set DATA to “0000 0000”. This is the command for No Operation.
3. Give XTAL1 a positive pulse. This loads the command, and the internal write signals are
Figure 25-2. Addressing the Flash Which is Organized in Pages
Note:
Figure 25-3. Programming the Flash Waveforms
Note:
The EEPROM is organized in pages, see
EEPROM, the program data is latched into a page buffer. This allows one page of data to be
reset.
RESET +12V
RDY/BSY
PAGEL
XTAL1
1. PCPAGE and PCWORD are listed in
DATA
1. “XX” is don’t care. The letters refer to the programming description above.
XA1
XA0
BS1
BS2
WR
OE
PROGRAM MEMORY
0x10
PROGRAM
COUNTER
A
PAGE
ADDR. LOW
PAGE ADDRESS
WITHIN THE FLASH
B
PCMSB
DATA LOW
C
PCPAGE
DATA HIGH
D
XX
E
ADDR. LOW
B
PAGEMSB
PCWORD
Table 25-8 on page
Table 25-7 on page
DATA LOW
C
WORD ADDRESS
WITHIN A PAGE
(1)
F
DATA HIGH
D
INSTRUCTION WORD
XX
E
PAGE
ADDR. HIGH
294.
G
(1)
294. When programming the
ADDR. EXT.H
ATmega1284P
H
I
XX
PCWORD[PAGEMSB:0]:
00
01
02
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