PIC18F4320-I/P Microchip Technology, PIC18F4320-I/P Datasheet - Page 87

• Manufacturer Part Number: PIC18F4320-I/P
• Description: IC MCU FLASH 4KX16 A/D 40-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4320-I/P

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.0
8.1
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18F2X20/4X20 devices. By making the multiply
a hardware operation, it completes in a single instruc-
tion cycle. This is an unsigned multiply that gives a
16-bit result. The result is stored into the 16-bit product
register pair (PRODH:PRODL). The multiplier does not
affect any flags in the STATUS register.
Making the 8 x 8 multiplier execute in a single-cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 8-1 shows a performance comparison between
enhanced devices using the single-cycle hardware
multiply and performing the same function without the
hardware multiply.
TABLE 8-1:
© 2007 Microchip Technology Inc.
16 x 16 unsigned
algorithms
8 x 8 unsigned
16 x 16 signed
8 x 8 signed
Routine
8 X 8 HARDWARE MULTIPLIER
Introduction
PERFORMANCE COMPARISON
Without hardware multiply
Without hardware multiply
Without hardware multiply
Without hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Multiply Method
PIC18F2220/2320/4220/4320
Program
Memory
(Words)
13
33
21
28
52
35
1
6
8.2
Example 8-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 8-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 8-1:
EXAMPLE 8-2:
MOVF
MULWF
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
Cycles
(Max)
242
254
69
91
28
40
1
6
Operation
ARG1, W
ARG2
ARG1, W
ARG2
ARG2, SB
PRODH, F
ARG2, W
ARG1, SB
PRODH, F
@ 40 MHz
24.2 μs
25.4 μs
100 ns
600 ns
6.9 μs
9.1 μs
2.8 μs
4.0 μs
8 x 8 UNSIGNED
MULTIPLY ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
@ 10 MHz
102.6 μs
27.6 μs
36.4 μs
96.8 μs
16.0 μs
11.2 μs
Time
400 ns
2.4 μs
PRODH:PRODL
DS39599G-page 85
- ARG1
- ARG2
@ 4 MHz
242 μs
254 μs
69 μs
91 μs
28 μs
40 μs
1 μs
6 μs