PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 20

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
5.2
The checksum is calculated by summing the contents
of all code memory locations and the device Configura-
tion
Significant 16 bits of this sum are the checksum.
The checksum calculation differs depending on
whether or not code protection is enabled. Since the
code memory locations read out differently depending
on the code-protect setting, the table describes how to
manipulate the actual code memory values to simulate
TABLE 5-5:
DS39688D-page 20
PIC18F66J60
PIC18F66J65
PIC18F67J60
PIC18F86J60
PIC18F86J65
PIC18F87J60
PIC18F96J60
PIC18F96J65
PIC18F97J60
Legend: [a] = Value at address a; SUM[a:b] = Sum of locations a to b inclusive; + = Addition; & = Bitwise AND.
Device
Words,
Checksum Computation
All addresses are hexadecimal.
appropriately
CHECKSUM COMPUTATION
Protection
Code
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
Off
On
masked.
SUM[000000:00FFF7] + ([00FFF8] & E1h) + ([00FFF9] & 0Ch) + ([00FFFA] & C7h) +
([00FFFB] & 0Fh) + ([00FFFD] & 04h)
0000h
SUM[000000:017FF7] + ([00FFF8] & E1h) + ([00FFF9] & 0Ch) + ([00FFFA] & C7h) +
([00FFFB] & 0Fh) + ([00FFFD] & 04h)
0000h
SUM[000000:01FFF7] + ([00FFF8] & E1h) + ([00FFF9] & 0Ch) + ([00FFFA] & C7h) +
([00FFFB] & 0Fh) + ([00FFFD] & 04h)
0000h
SUM[000000:00FFF7] + ([017FF8] & E1h) + ([017FF9] & 0Ch) + ([017FFA] & C7h) +
([017FFB] & 0Fh) + ([017FFD] & 07h)
0000h
SUM[000000:017FF7] + ([017FF8] & E1h) + ([017FF9] & 0Ch) + ([017FFA] & C7h) +
([017FFB] & 0Fh) + ([017FFD] & 07h)
0000h
SUM[000000:01FFF7] + ([017FF8] & E1h) + ([017FF9] & 0Ch) + ([017FFA] & C7h) +
([017FFB] & 0Fh) + ([017FFD] & 07h)
0000h
SUM[000000:00FFF7] + ([01FFF8] & E1h) + ([01FFF9] & 0Ch) + ([01FFFA] & C7h) +
([01FFFB] & 0Fh) + ([01FFFC] & F8h) + ([01FFFD] & 07h)
0000h
SUM[000000:017FF7] + ([01FFF8] & E1h) + ([01FFF9] & 0Ch) + ([01FFFA] & C7h) +
([01FFFB] & 0Fh) + ([01FFFC] & F8h) + ([01FFFD] & 07h)
0000h
SUM[000000:01FFF7] + ([01FFF8] & E1h) + ([01FFF9] & 0Ch) + ([01FFFA] & C7h) +
([01FFFB] & 0Fh) + ([01FFFC] & F8h) + ([01FFFD] & 07h)
0000h
The
Least
the values that would be read from a protected device.
When calculating a checksum by reading a device, the
entire code memory can simply be read and summed.
The Configuration Words can always be read.
Table 5-5 describes how to calculate the checksum for
each device.
Checksum
© 2009 Microchip Technology Inc.