ATMEGA324P-20PU Atmel, ATMEGA324P-20PU Datasheet - Page 279

IC MCU AVR 32K FLASH 40-DIP

ATMEGA324P-20PU

Manufacturer Part Number
ATMEGA324P-20PU
Description
IC MCU AVR 32K FLASH 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA324P-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
1 KB
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
23.5
8011O–AVR–07/10
Boot Loader Lock Bits
Figure 23-2. Memory Sections
Note:
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
• To protect the entire Flash from a software update by the MCU.
• To protect only the Boot Loader Flash section from a software update by the MCU.
• To protect only the Application Flash section from a software update by the MCU.
• Allow software update in the entire Flash.
See
can be set in software and in Serial or Parallel Programming mode, but they can be cleared by a
Chip Erase command only. The general Write Lock (Lock Bit mode 2) does not control the pro-
gramming of the Flash memory by SPM instruction. Similarly, the general Read/Write Lock
(Lock Bit mode 1) does not control reading nor writing by (E)LPM/SPM, if it is attempted.
Table 23-2 on page 280
1. The parameters in the figure above are given in
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Program Memory
Program Memory
BOOTSZ = '11'
BOOTSZ = '01'
and
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
Table 23-3 on page 280
ATmega164P/324P/644P
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Table 23-7 on page
Program Memory
Program Memory
BOOTSZ = '10'
BOOTSZ = '00'
for further details. The Boot Lock bits
288.
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW, End Application
Start NRWW, Start Boot Loader
Flashend
279

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