ATMEGA324P-20AU Atmel, ATMEGA324P-20AU Datasheet - Page 281
ATMEGA324P-20AU
Manufacturer Part Number
ATMEGA324P-20AU
Description
IC MCU AVR 32K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA164P-20AU.pdf
(28 pages)
2.ATMEGA164P-20AU.pdf
(439 pages)
3.ATMEGA324P-20AU.pdf
(26 pages)
Specifications of ATMEGA324P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
2-Wire/JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package
44TQFP
Family Name
ATmega
Maximum Speed
20 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
ATMEL
Quantity:
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Manufacturer:
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23.7
8011O–AVR–07/10
Addressing the Flash During Self-Programming
The Z-pointer is used to address the SPM commands. The Z pointer consists of the Z-registers
ZL and ZH in the register file, and RAMPZ in the I/O space. The number of bits actually used is
implementation dependent. Note that the RAMPZ register is only implemented when the pro-
gram space is larger than 64 Kbytes.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
addressed independently. Therefore it is of major importance that the Boot Loader software
addresses the same page in both the Page Erase and Page Write operation. Once a program-
ming operation is initiated, the address is latched and the Z-pointer can be used for other
operations.
The (E)LPM instruction use the Z-pointer to store the address. Since this instruction addresses
the Flash byte-by-byte, also bit Z0 of the Z-pointer is used.
Figure 23-3. Addressing the Flash During SPM
Note:
Bit
RAMPZ
ZH (R31)
ZL (R30)
Z - REGISTER
1. The different variables used in
PROGRAM MEMORY
BIT
RAMPZ7
Z15
Z7
PAGE
23
15
PROGRAM
COUNTER
7
15
Figure
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
RAMPZ6
PCMSB
Z14
Z6
22
14
23-3. Note that the Page Erase and Page Write operations are
6
PCPAGE
RAMPZ5
Z13
Z5
21
13
5
Figure 23-3
ZPAGEMSB
PAGEMSB
Table 24-7 on page
PCWORD
RAMPZ4
Z12
Z4
20
12
4
WORD ADDRESS
WITHIN A PAGE
(1)
ATmega164P/324P/644P
are listed in
1
0
0
RAMPZ3
INSTRUCTION WORD
Z11
Z3
19
11
3
PAGE
Table 23-9 on page
296), the Program Counter can
RAMPZ2
Z10
Z2
18
10
2
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
RAMPZ1
Z9
Z1
17
288.
9
1
RAMPZ0
Z8
Z0
16
8
0
281
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