ATMEGA324P-20AU Atmel, ATMEGA324P-20AU Datasheet - Page 150

IC MCU AVR 32K FLASH 44-TQFP

ATMEGA324P-20AU

Manufacturer Part Number
ATMEGA324P-20AU
Description
IC MCU AVR 32K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA324P-20AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
2-Wire/JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package
44TQFP
Family Name
ATmega
Maximum Speed
20 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA324P-20AU
Manufacturer:
ATMEL
Quantity:
5 160
Part Number:
ATMEGA324P-20AU
Manufacturer:
ATMEL
Quantity:
800
Part Number:
ATMEGA324P-20AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA324P-20AUR
Manufacturer:
Atmel
Quantity:
10 000
14.9
8011O–AVR–07/10
Asynchronous Operation of Timer/Counter2
Figure 14-11 on page 150
Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
When Timer/Counter2 operates asynchronously, some considerations must be taken.
• Warning: When switching between asynchronous and synchronous clocking of
• The CPU main clock frequency must be more than four times the Oscillator frequency.
• When writing to one of the registers TCNT2, OCR2x, or TCCR2x, the value is transferred to a
• When entering Power-save or ADC Noise Reduction mode after having written to TCNT2,
Timer/Counter2, the Timer Registers TCNT2, OCR2x, and TCCR2x might be corrupted. A safe
procedure for switching clock source is:
temporary register, and latched after two positive edges on TOSC1. The user should not write
a new value before the contents of the temporary register have been transferred to its
destination. Each of the five mentioned registers have their individual temporary register, which
means that, for example, writing to TCNT2 does not disturb an OCR2x write in progress. To
detect that a transfer to the destination register has taken place, the Asynchronous Status
Register – ASSR has been implemented.
OCR2x, or TCCR2x, the user must wait until the written register has been updated if
Timer/Counter2 is used to wake up the device. Otherwise, the MCU will enter sleep mode
before the changes are effective. This is particularly important if any of the Output Compare2
interrupt is used to wake up the device, since the Output Compare function is disabled during
writing to OCR2x or TCNT2. If the write cycle is not finished, and the MCU enters sleep mode
a. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.
b. Select clock source by setting AS2 as appropriate.
c. Write new values to TCNT2, OCR2x, and TCCR2x.
d. To switch to asynchronous operation: Wait for TCN2UB, OCR2xUB, and TCR2xUB.
e. Clear the Timer/Counter2 Interrupt Flags.
f.
TCNTn
(clk
(CTC)
OCRnx
OCFnx
clk
clk
Enable interrupts, if needed.
I/O
I/O
Tn
/8)
caler (f
clk_I/O
TOP - 1
shows the setting of OCF2A and the clearing of TCNT2 in CTC mode.
/8)
TOP
TOP
ATmega164P/324P/644P
BOTTOM
BOTTOM + 1
150

Related parts for ATMEGA324P-20AU