AT91SAM7S321-MU Atmel, AT91SAM7S321-MU Datasheet - Page 536
AT91SAM7S321-MU
Manufacturer Part Number
AT91SAM7S321-MU
Description
MCU ARM 32K HI SPD FLASH 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S321-MU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, I2S, SPI, SSC, TWI, UART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
32
Number Of Timers
10 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S321-MU
Manufacturer:
ATMEL
Quantity:
9 500
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36.3
Table 36-1.
36.4
36.4.1
36.4.2
36.4.3
36.4.4
36.4.5
36.4.6
536
Pin Name
ADVREF
AD0 - AD7
ADTRG
Signal Description
Product Dependencies
AT91SAM7S Series Preliminary
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
Timer Triggers
Conversion Performances
ADC Pin Description
The ADC Controller clock (MCK) is always clocked.
The ADC interrupt line is connected on one of the internal sources of the Advanced Interrupt
Controller. Using the ADC interrupt requires the AIC to be programmed first.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the ADC
input is automatically done as soon as the corresponding channel is enabled by writing the reg-
ister ADC_CHER. By default, after reset, the PIO line is configured as input with its pull-up
enabled and the ADC input is connected to the GND.
The pin ADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin ADTRG to the ADC
function.
Timer Counters may or may not be used as hardware triggers depending on user requirements.
Thus, some or all of the timer counters may be non-connected.
For performance and electrical characteristics of the ADC, see the DC Characteristics section.
Description
Reference voltage
Analog input channels
External trigger
6175K–ATARM–30-Aug-10
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