PIC24FJ128GB106-I/PT Microchip Technology, PIC24FJ128GB106-I/PT Datasheet - Page 33
![IC PIC MCU FLASH 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ128GB106-I/PT
Manufacturer Part Number
PIC24FJ128GB106-I/PT
Description
IC PIC MCU FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ128GB106-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM183026 - KIT EVALUATION PIC16F/PIC24FDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128GB106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- PIC24FJ192GB108-IPT PDF datasheet #4
- Current page: 33 of 328
- Download datasheet (6Mb)
3.0
As Harvard architecture devices, PIC24F micro-
controllers feature separate program and data memory
spaces and busses. This architecture also allows the
direct access of program memory from the data space
during code execution.
3.1
The
PIC24FJ256GB110 family devices is 4M instructions.
The space is addressable by a 24-bit value derived
FIGURE 3-1:
© 2008 Microchip Technology Inc.
Note:
program
Device Config Registers
Alternate Vector Table
PIC24FJ64GB1XX
Interrupt Vector Table
Flash Config Words
MEMORY ORGANIZATION
Program Address Space
Program Memory
(22K instructions)
GOTO Instruction
Unimplemented
Reset Address
User Flash
DEVID (2)
Reserved
Reserved
Reserved
Memory areas are not shown to scale.
Read ‘0’
address
PROGRAM SPACE MEMORY MAP FOR PIC24FJ256GB110 FAMILY DEVICES
memory
Device Config Registers
PIC24FJ128GB1XX
Alternate Vector Table
Interrupt Vector Table
Flash Config Words
Program Memory
(44K instructions)
GOTO Instruction
Unimplemented
Reset Address
space
User Flash
DEVID (2)
Reserved
Reserved
Reserved
Read ‘0’
of
PIC24FJ256GB110 FAMILY
Preliminary
the
Device Config Registers
PIC24FJ192GB1XX
Alternate Vector Table
Interrupt Vector Table
Flash Config Words
Program Memory
(67K instructions)
from either the 23-bit Program Counter (PC) during pro-
gram execution, or from table operation or data space
remapping, as described in Section 3.3 “Interfacing
Program and Data Memory Spaces”.
User access to the program memory space is restricted
to the lower half of the address range (000000h to
7FFFFFh). The exception is the use of TBLRD/TBLWT
operations which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space.
Memory maps for the PIC24FJ256GB110 family of
devices are shown in Figure 3-1.
GOTO Instruction
Unimplemented
Reset Address
User Flash
DEVID (2)
Reserved
Reserved
Reserved
Read ‘0’
Device Config Registers
PIC24FJ256GB1XX
Alternate Vector Table
Interrupt Vector Table
Flash Config Words
Program Memory
(87K instructions)
GOTO Instruction
Unimplemented
Reset Address
User Flash
DEVID (2)
Reserved
Reserved
Reserved
Read ‘0’
DS39897B-page 31
000000h
000002h
000004h
0000FEh
000100h
000104h
0001FEh
000200h
00ABFEh
00AC00h
0157FEh
015800h
020BFEh
020C00h
02ABFEh
02AC00h
7FFFFFh
800000h
F7FFFEh
F80000h
F8000Eh
F80010h
FEFFFEh
FF0000h
FFFFFFh
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