DSPIC33FJ128GP306A-I/PT Microchip Technology, DSPIC33FJ128GP306A-I/PT Datasheet - Page 149

• Manufacturer Part Number: DSPIC33FJ128GP306A-I/PT
• Description: IC DSPIC MCU/DSP 128K 64-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP306A-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 53
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: No
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 18-chx10-bit|18-chx12-bit
• Number Of Timers: 9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.0
FIGURE 9-1:
© 2011 Microchip Technology Inc.
Note 1: See
Note 1: This
SOSCO
SOSCI
R
(2)
2: If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
3: The term,
2: Some registers and associated bits
OSCILLATOR
CONFIGURATION
Throughout this document
different when Doze mode is used in any ratio other than 1:1, which is the default.
features of the dsPIC33FJXXXGPX06A/
X08A/X10A family of devices. However,
it
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 7. “Oscillator”
(DS70186) in the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
OSC1
OSC2
Oscillator
TUN<5:0>
FRC
Figure 9-2
is
Primary Oscillator
Secondary Oscillator
data
POSCMD<1:0>
F
not
dsPIC33FJXXXGPX06A/X08A/X10A OSCILLATOR SYSTEM DIAGRAM
Oscillator
P
LPRC
refers to the clock source for all the peripherals, while
dsPIC33FJXXXGPX06A/X08A/X10A
for PLL details.
sheet
intended
LPOSCEN
S1
S3
÷ 16
summarizes
F
P
and
to
FRCDIV<2:0>
F
CY
be
are used interchangeably, except in the case of Doze mode.
the
PLL
in
a
(1)
XTPLL, HSPLL,
ECPLL, FRCPLL
Clock Fail
The dsPIC33FJXXXGPX06A/X08A/X10A oscillator
system provides:
• Various external and internal oscillator options as
• An on-chip PLL to scale the internal operating
• The internal FRC oscillator can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• An Oscillator Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in
S7
XT, HS, EC
FRCDIV16
clock sources
frequency to the required system clock frequency
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
clock failure and takes fail-safe measures
selection
Figure
FRCDIVN
SOSC
LPRC
FRC
9-1.
Clock Switch
NOSC<2:0> FNOSC<2:0>
F
S1/S3
S7
S6
S0
S5
S4
S2
CY
refers to the clock source for the CPU.
÷ 2
Reset
DOZE<2:0>
DS70593C-page 149
F
WDT, PWRT,
P
and
Timer 1
FSCM
F
CY
F
will be
F
F
OSC
P (3)
CY