PIC18F2525-I/SO Microchip Technology, PIC18F2525-I/SO Datasheet - Page 386

• Manufacturer Part Number: PIC18F2525-I/SO
• Description: IC MCU FLASH 24KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2525-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3DB18F4620 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2525/2620/4525/4620
Timing Diagrams and Specifications ................................ 343
DS39626B-page 384
A/D Conversion Requirements ................................ 360
Capture/Compare/PWM (CCP) Requirements ........ 348
CLKO and I/O Requirements ................................... 345
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
External Clock Requirements .................................. 343
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements
PLL Clock ................................................................. 344
Reset, Watchdog Timer,
Timer0 and Timer1 External
USART Synchronous Receive
USART Synchronous Transmission
2
C Bus Data Requirements (Slave Mode) .............. 355
(Master Mode, CKE = 0) .................................. 350
(Master Mode, CKE = 1) .................................. 351
(Slave Mode, CKE = 0) .................................... 352
(Slave Mode, CKE = 1) .................................... 353
Requirements ................................................... 356
(PIC18F4410/4510/4515/4610) ....................... 349
Oscillator Start-up Timer,
Power-up Timer and
Brown-out Reset Requirements ....................... 346
Clock Requirements ......................................... 347
Requirements ................................................... 358
Requirements ................................................... 358
2
2
C Bus Data Requirements ................ 357
C Bus Start/Stop Bits
Preliminary
Top-of-Stack Access .......................................................... 54
TRISE Register
TSTFSZ ........................................................................... 307
Two-Speed Start-up ................................................. 249, 260
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 339
W
Watchdog Timer (WDT) ........................................... 249, 258
WCOL ...................................................... 189, 190, 191, 194
WCOL Status Flag ................................... 189, 190, 191, 194
WWW, On-Line Support ...................................................... 5
X
XORLW ............................................................................ 307
XORWF ........................................................................... 308
PSPMODE Bit .......................................................... 114
Example Cases .......................................................... 58
BRGH Bit ................................................................. 205
Associated Registers ............................................... 259
Control Register ....................................................... 258
During Oscillator Failure .......................................... 261
Programming Considerations .................................. 258
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