PIC16F84-10/SO Microchip Technology, PIC16F84-10/SO Datasheet - Page 278

• Manufacturer Part Number: PIC16F84-10/SO
• Description: IC MCU FLASH 1KX14 EE 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F84-10/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 13
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 68Byte
• Cpu Speed: 10MHz
• No. Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MIL309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
17.1
SPI is a trademark of Motorola Corporation.
I
DS31017A-page 17-2
2
C is a trademark of Philips Corporation.
Introduction
The Master Synchronous Serial Port (MSSP) module is a serial interface useful for communicat-
ing with other peripheral or microcontroller devices. These peripheral devices may be serial
EEPROMs, shift registers, display drivers, A/D converters, etc. The MSSP module can operate
in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
Figure 17-1
the block diagrams for the two different I
Figure 17-1:
- Full Master Mode
- Slave mode (with general address call)
shows a block diagram for the SPI mode, while
SPI Mode Block Diagram
SDO
SCK
SDI
SS
2
C™)
Preliminary
Read
SS Control
SMP:CKE
Select
Edge
Enable
bit0
Select
2
Edge
C modes of operation.
SSPBUF reg
Data to TX/RX in SSPSR
TRIS bit
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
shift clock
Prescaler
Write
4, 16, 64
Figure
TMR2 output
data bus
Internal
2
1997 Microchip Technology Inc.
17-2, and
T
OSC
Figure 17-3
show