PIC16C773-I/SO Microchip Technology, PIC16C773-I/SO Datasheet - Page 47

• Manufacturer Part Number: PIC16C773-I/SO
• Description: IC MCU OTP 4KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C773-I/SO

• Program Memory Type: OTP
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC16C773-04I/SO

7.0
Each CCP (Capture/Compare/PWM) module contains
a 16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register or as a PWM
master/slave Duty Cycle register.
timer resources of the CCP module modes.
The operation of CCP1 is identical to that of CCP2, with
the exception of the special trigger. Therefore, opera-
tion of a CCP module in the following sections is
described with respect to CCP1.
Table 7-2
CCP1 Module
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 7-2
FIGURE 7-1:
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
1999 Microchip Technology Inc.
bit7
bit 7-6: Unimplemented: Read as '0'
bit 5-4: CCPxX:CCPxY: PWM Least Significant bits
bit 3-0: CCPxM3:CCPxM0: CCPx Mode Select bits
U-0
—
CAPTURE/COMPARE/PWM
(CCP) MODULE(S)
shows the interaction of the CCP modules.
U-0
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
0000 = Capture/Compare/PWM off (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is unaffected)
1011 = Compare mode, trigger special event (CCPxIF bit is set; CCP1 resets TMR1; CCP2 resets TMR1
11xx = PWM mode
—
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
CCP1CON REGISTER (ADDRESS 17h) / CCP2CON REGISTER (ADDRESS 1Dh)
CCPxX
R/W-0
and starts an A/D conversion (if A/D module is enabled))
CCPxY CCPxM3
Same TMR1 time-base.
The compare should be configured for the special event trigger, which clears TMR1.
The compare(s) should be configured for the special event trigger, which clears TMR1.
The PWMs will have the same frequency, and update rate (TMR2 interrupt).
None
None
R/W-0
Table 7-1
R/W-0
Advance Information
shows the
CCPxM2
R/W-0
CCPxM1 CCPxM0
R/W-0
CCP2 Module
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
Additional information on the CCP module is available
in the PICmicro™ Mid-Range Reference Manual,
(DS33023).
TABLE 7-1
Interaction
CCP Mode
Compare
Capture
PWM
R/W-0
bit0
CCP MODE - TIMER
RESOURCE
R = Readable bit
W = Writable bit
U = Unimplemented bit, read
- n =Value at POR reset
PIC16C77X
as ‘0’
Timer Resource
DS30275A-page 47
Timer1
Timer1
Timer2