PIC18F4331-I/PT Microchip Technology, PIC18F4331-I/PT Datasheet - Page 296

• Manufacturer Part Number: PIC18F4331-I/PT
• Description: IC PIC MCU FLASH 4KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4331-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F4331-I/PTR; PIC18F4331-I/PTR

PIC18F2331/2431/4331/4431
TABLE 23-2:
DS39616C-page 294
LITERAL OPERATIONS
ADDLW
ANDLW
IORLW
LFSR
MOVLB
MOVLW
MULLW
RETLW
SUBLW
XORLW
DATA MEMORY ↔ PROGRAM MEMORY OPERATIONS
TBLRD*
TBLRD*+
TBLRD*-
TBLRD+*
TBLWT*
TBLWT*+
TBLWT*-
TBLWT+*
Note 1:
Mnemonic,
Operands
2:
3:
4:
5:
When a PORT register is modified as a function of itself (e.g.,
value present on the pins themselves. For example, if the data latch is ‘
driven low by an external device, the data will be written back with a ‘
If this instruction is executed on the TMR0 register (and, where applicable, d =
assigned.
If the Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The
second cycle is executed as a NOP.
Some instructions are 2-word instructions. The second word of these instructions will be executed as a NOP
unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all
program memory locations have a valid instruction.
If the table write starts the write cycle to internal memory, the write will continue until terminated.
k
k
k
f, k
k
k
k
k
k
k
PIC18FXXXX INSTRUCTION SET (CONTINUED)
Add Literal and WREG
AND Literal with WREG
Inclusive OR Literal with WREG
Load Literal (12-bit) 2nd word
Move Literal to BSR<3:0>
Move Literal to WREG
Multiply Literal with WREG
Return with Literal in WREG
Subtract WREG from Literal
Exclusive OR Literal with WREG
Table Read
Table Read with Post-Increment
Table Read with Post-Decrement
Table Read with Pre-Increment
Table Write
Table Write with Post-Increment
Table Write with Post-Decrement
Table Write with Pre-Increment
to FSRx
Description
1st word
Preliminary
1
1
1
2
1
1
1
2
1
1
2
2 (5)
Cycles
0000
0000
0000
1110
1111
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
MSb
16-Bit Instruction Word
1111
1011
1001
1110
0000
0001
1110
1101
1100
1000
1010
0000
0000
0000
0000
0000
0000
0000
0000
MOVF PORTB, 1, 0
kkkk
kkkk
kkkk
00ff
kkkk
0000
kkkk
kkkk
kkkk
kkkk
kkkk
0000
0000
0000
0000
0000
0000
0000
0000
0
’.
1
’ for a pin configured as input and is
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
kkkk
1000
1001
1010
1011
1100
1101
1110
1111
LSb
1
), the prescaler will be cleared if
© 2007 Microchip Technology Inc.
), the value used will be that
C, DC, Z, OV, N
Z, N
Z, N
None
None
None
None
None
C, DC, Z, OV, N
Z, N
None
None
None
None
None
None
None
None
Affected
Status
Notes