DSPIC33FJ128GP202-I/MM Microchip Technology, DSPIC33FJ128GP202-I/MM Datasheet - Page 264
![IC DSPIC MCU/DSP 128K 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ128GP202-I/MM
Manufacturer Part Number
DSPIC33FJ128GP202-I/MM
Description
IC DSPIC MCU/DSP 128K 28-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ128GP202-I/MM
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
28-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 264 of 402
- Download datasheet (3Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 21-7:
REGISTER 21-8:
DS70292D-page 264
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-0
Note 1: On devices without 13 analog inputs, all AD1CSSL bits can be selected by the user application. However,
Note 1: On devices without 13 analog inputs, all PCFG bits are R/W by user software. However, the PCFG bits are
PCFG7
R/W-0
R/W-0
CSS7
U-0
U-0
—
—
2: CSSx = ANx, where x = 0 through 12.
2: PCFGx = ANx, where x = 0 through 12.
3: PCFGx bits have no effect if ADC module is disabled by setting ADxMD bit in the PMDx Register. In this
inputs selected for scan without a corresponding input on device converts V
ignored on ports without a corresponding input on device.
case all port pins multiplexed with ANx will be in Digital mode.
Unimplemented: Read as ‘0’
CSS<11:0>: ADC Input Scan Selection bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Unimplemented: Read as ‘0’
PCFG<12:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG6
R/W-0
R/W-0
CSS6
U-0
U-0
—
—
AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW
AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
CSS5
U-0
U-0
—
—
PCFG12
PCFG4
CSS12
R/W-0
R/W-0
R/W-0
R/W-0
CSS4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG11
PCFG3
CSS11
R/W-0
R/W-0
R/W-0
R/W-0
CSS3
PCFG10
PCFG2
CSS10
R/W-0
R/W-0
R/W-0
R/W-0
CSS2
2009 Microchip Technology Inc.
REFL
(1,2)
x = Bit is unknown
x = Bit is unknown
.
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
CSS9
CSS1
(1,2,3)
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
R/W-0
CSS8
CSS0
SS
bit 8
bit 0
bit 8
bit 0
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