DSPIC33FJ64GP202-I/MM Microchip Technology, DSPIC33FJ64GP202-I/MM Datasheet - Page 78
![IC DSPIC MCU/DSP 64K 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC33FJ64GP202-I/MM
Manufacturer Part Number
DSPIC33FJ64GP202-I/MM
Description
IC DSPIC MCU/DSP 64K 28-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ64GP202-I/MM
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
28-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 78 of 412
- Download datasheet (6Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
EXAMPLE 5-2:
EXAMPLE 5-3:
DS70292E-page 78
; Set up NVMCON for row programming operations
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 63rd_program_word
2nd_program_word
MOV
MOV
MOV
MOV
MOV
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
•
•
•
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
#0x4001, W0
W0, NVMCON
#0x0000, W0
W0, TBLPAG
#0x6000, W0
#LOW_WORD_0, W2
#HIGH_BYTE_0, W3
#LOW_WORD_1, W2
#HIGH_BYTE_1, W3
#LOW_WORD_2, W2
#HIGH_BYTE_2, W3
#LOW_WORD_31, W2
#HIGH_BYTE_31, W3
#5
#0x55, W0
W0, NVMKEY
#0xAA, W1
W1, NVMKEY
NVMCON, #WR
LOADING THE WRITE BUFFERS
INITIATING A PROGRAMMING SEQUENCE
;
; Initialize NVMCON
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 55 key
;
; Write the AA key
; Start the erase sequence
; Insert two NOPs after the
; erase command is asserted
© 2011 Microchip Technology Inc.
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