DSPIC33FJ64GP202-I/MM Microchip Technology, DSPIC33FJ64GP202-I/MM Datasheet - Page 406
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DSPIC33FJ64GP202-I/MM
Manufacturer Part Number
DSPIC33FJ64GP202-I/MM
Description
IC DSPIC MCU/DSP 64K 28-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ64GP202-I/MM
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
28-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 406 of 412
- Download datasheet (6Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Reset
Reset Sequence.................................................................. 87
Resets ................................................................................. 79
DS70292E-page 406
DMAxSTA (DMA Channel x RAM Start Address A).. 134
DMAxSTB (DMA Channel x RAM Start Address B).. 134
DSADR (Most Recent DMA RAM Address).............. 139
I2CxCON (I2Cx Control) ........................................... 209
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 213
I2CxSTAT (I2Cx Status) ........................................... 211
IFS0 (Interrupt Flag Status 0) ............................. 97, 104
IFS1 (Interrupt Flag Status 1) ............................. 99, 106
IFS2 (Interrupt Flag Status 2) ........................... 101, 108
IFS3 (Interrupt Flag Status 3) ........................... 102, 109
IFS4 (Interrupt Flag Status 4) ........................... 103, 110
INTCON1 (Interrupt Control 1) .................................... 94
INTCON2 (Interrupt Control 2) .................................... 96
INTTREG Interrupt Control and Status Register....... 127
IPC0 (Interrupt Priority Control 0) ............................. 111
IPC1 (Interrupt Priority Control 1) ............................. 112
IPC11 (Interrupt Priority Control 11) ......................... 121
IPC14 (Interrupt Priority Control 14) ......................... 122
IPC15 (Interrupt Priority Control 15) ......................... 123
IPC16 (Interrupt Priority Control 16) ......................... 124
IPC17 (Interrupt Priority Control 17) ......................... 125
IPC18 (Interrupt Priority Control 18) ......................... 126
IPC2 (Interrupt Priority Control 2) ............................. 113
IPC3 (Interrupt Priority Control 3) ............................. 114
IPC4 (Interrupt Priority Control 4) ............................. 115
IPC5 (Interrupt Priority Control 5) ............................. 116
IPC6 (Interrupt Priority Control 6) ............................. 117
IPC7 (Interrupt Priority Control 7) ............................. 118
IPC8 (Interrupt Priority Control 8) ............................. 119
IPC9 (Interrupt Priority Control 9) ............................. 120
NVMCON (Flash Memory Control) ............................. 75
NVMKEY (Nonvolatile Memory Key) .......................... 76
OCxCON (Output Compare x Control) ..................... 199
OSCCON (Oscillator Control) ................................... 145
OSCTUN (FRC Oscillator Tuning) ............................ 149
PLLFBD (PLL Feedback Divisor) .............................. 148
PMD1 (Peripheral Module Disable
PMD1 (Peripheral Module Disable Control Register 1)...
PMD2 (Peripheral Module Disable
PMD3 (Peripheral Module Disable
PxTCON (PWM Time Base Control)......... 267, 268, 269
RCON (Reset Control) ................................................ 80
RSCON (DCI Receive Slot Control).......................... 252
SPIxCON1 (SPIx Control 1) ...................................... 203
SPIxCON2 (SPIx Control 2) ...................................... 205
SPIxSTAT (SPIx Status and Control) ....................... 202
SR (CPU Status) ................................................... 28, 92
T1CON (Timer1 Control)........................................... 188
TCxCON (Input Capture x Control) ........................... 196
TSCON (DCI Transmit Slot Control) ......................... 252
TxCON (Type B Time Base Control) ........................ 192
TyCON (Type C Time Base Control) ........................ 193
UxMODE (UARTx Mode) .......................................... 216
UxSTA (UARTx Status and Control) ......................... 218
Illegal Opcode ....................................................... 79, 86
Trap Conflict.......................................................... 85, 86
Uninitialized W Register ........................................ 79, 86
Control Register 1)............................................ 155
155
Control Register 2)............................................ 156
Control Register 3)............................................ 157
S
Serial Peripheral Interface (SPI) ....................................... 201
Software Reset Instruction (SWR)...................................... 85
Software Simulator (MPLAB SIM) .................................... 319
Software Stack Pointer, Frame Pointer
Special Features of the CPU ............................................ 299
SPI Module
Symbols Used in Opcode Descriptions ............................ 310
System Control
T
Temperature and Voltage Specifications
Timer1............................................................................... 187
Timer2/3............................................................................ 189
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
CALLL Stack Frame ................................................... 63
SPI1 Register Map...................................................... 50
Register Map .............................................................. 62
AC..................................................................... 330, 368
CLKO and I/O ........................................................... 333
10-bit A/D Conversion (CHPS<1:0> = 01,
10-bit A/D Conversion (CHPS<1:0> = 01,
12-bit A/D Conversion (ASAM = 0,
Brown-out Situations................................................... 85
DCI AC-Link Mode.................................................... 351
DCI Multi -Channel, I
ECAN I/O .................................................................. 353
External Clock........................................................... 331
I2Cx Bus Data (Master Mode) .................................. 345
I2Cx Bus Data (Slave Mode) .................................... 347
I2Cx Bus Start/Stop Bits (Master Mode)................... 345
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 347
Input Capture (CAPx) ............................................... 338
OC/PWM................................................................... 339
Output Compare (OCx)............................................. 338
Reset, Watchdog Timer, Oscillator Start-up Timer
SPIx Master Mode (CKE = 0) ................................... 340
SPIx Master Mode (CKE = 1) ................................... 341
SPIx Slave Mode (CKE = 0) ..................................... 342
SPIx Slave Mode (CKE = 1) ..................................... 343
Timer1, 2 and 3 External Clock ................................ 336
ADC Conversion (10-bit mode)................................. 372
ADC Conversion (12-bit Mode)................................. 372
CLKO and I/O ........................................................... 333
DCI AC-Link Mode.................................................... 352
DCI Multi-Channel, I
External Clock........................................................... 331
Input Capture ............................................................ 338
SPIx Master Mode (CKE = 0) ................................... 369
SPIx Module Master Mode (CKE = 1) ...................... 369
SPIx Module Slave Mode (CKE = 0) ........................ 370
SPIx Module Slave Mode (CKE = 1) ........................ 370
10-bit A/D Conversion Requirements ....................... 360
12-bit A/D Conversion Requirements ....................... 358
SIMSAM = 0, ASAM = 0,
SSRC<2:0> = 000) ........................................... 359
SIMSAM = 0, ASAM = 1, SSRC<2:0> = 111,
SAMC<4:0> = 00001)....................................... 359
SSRC<2:0> = 000) ........................................... 357
and Power-up Timer ......................................... 334
2
2
S Modes.................................. 350
© 2011 Microchip Technology Inc.
S Modes................................. 349
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