ATMEGA164P-20PU Atmel, ATMEGA164P-20PU Datasheet - Page 308

• Manufacturer Part Number: ATMEGA164P-20PU
• Description: IC MCU AVR 16K FLASH 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA164P-20PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: 2-Wire/JTAG/SPI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.8
24.8.1
8011O–AVR–07/10
Serial Downloading
Serial Programming Pin Mapping
Both the Flash and EEPROM memory arrays can be programmed using a serial programming
bus while RESET is pulled to GND. The serial programming interface consists of pins SCK,
MOSI (input) and MISO (output). After RESET is set low, the Programming Enable instruction
needs to be executed first before program/erase operations can be executed. NOTE, in
24-15 on page
SPI pins dedicated for the internal Serial Peripheral Interface - SPI.
Table 24-15. Pin Mapping Serial Programming
Figure 24-10. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
High: > 2 CPU clock cycles for f
Symbol
MOSI
MISO
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to the
2. V
SCK
XTAL1 pin.
CC
- 0.3V < AVCC < V
308, the pin mapping for serial programming is listed. Not all packages use the
(PDIP-40)
Pins
PB5
PB6
PB7
MOSI
MISO
SCK
ck
ck
CC
< 12 MHz, 3 CPU clock cycles for f
< 12 MHz, 3 CPU clock cycles for f
+ 0.3V, however, AVCC should always be within 1.8V - 5.5V
XTAL1
RESET
GND
(TQFP-44)
(1)
Pins
PB5
PB6
PB7
ATmega164P/324P/644P
AVCC
VCC
+1.8V - 5.5V
+1.8V - 5.5V
I/O
O
I
I
(2)
ck
ck
>= 12 MHz
>= 12 MHz
Serial Data out
Serial Data in
Description
Serial Clock
Table
308