PIC18F6390-I/PT Microchip Technology, PIC18F6390-I/PT Datasheet - Page 406

• Manufacturer Part Number: PIC18F6390-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6390-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F6390/6490/8390/8490
RESET ............................................................................. 325
Reset .................................................................................. 51
Resets .............................................................................. 281
RETFIE ............................................................................ 326
RETLW ............................................................................. 326
RETURN .......................................................................... 327
Return Address Stack ........................................................ 66
Return Stack Pointer (STKPTR) ........................................ 67
Revision History ............................................................... 393
RLCF ................................................................................ 327
RLNCF ............................................................................. 328
RRCF ............................................................................... 328
RRNCF ............................................................................. 329
S
SCK .................................................................................. 157
SDI ................................................................................... 157
SDO ................................................................................. 157
Serial Clock, SCK ............................................................. 157
Serial Data In (SDI) .......................................................... 157
Serial Data Out (SDO) ..................................................... 157
Serial Peripheral Interface. See SPI Mode.
DS39629B-page 404
OSCCON (Oscillator Control) .................................... 38
OSCTUNE (Oscillator Tuning) ................................... 35
PIE1 (Peripheral Interrupt Enable 1) ........................ 101
PIE2 (Peripheral Interrupt Enable 2) ........................ 102
PIE3 (Peripheral Interrupt Enable 3) ........................ 103
PIR1 (Peripheral Interrupt
PIR2 (Peripheral Interrupt
PIR3 (Peripheral Interrupt
RCON (Reset Control) ....................................... 52, 107
RCSTA1 (EUSART Receive Status
RCSTA2 (AUSART Receive Status
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 159
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ...................... 158
Status ......................................................................... 80
STKPTR (Stack Pointer) ............................................ 67
T0CON (Timer0 Control) .......................................... 131
T1CON (Timer1 Control) .......................................... 135
T2CON (Timer 2 Control) ......................................... 141
T3CON (Timer3 Control) .......................................... 143
TXSTA1 (EUSART Transmit Status
TXSTA2 (AUSART Transmit Status
WDTCON (Watchdog Timer Control) ....................... 288
MCLR Reset, during Power
MCLR Reset, Normal Operation ................................ 51
Power-on Reset (POR) .............................................. 51
Programmable Brown-out
Stack Full Reset ......................................................... 51
Stack Underflow Reset .............................................. 51
Watchdog Timer (WDT) Reset ................................... 51
Request (Flag) 1) ............................................... 98
Request (Flag) 2) ............................................... 99
Request (Flag) 3) ............................................. 100
and Control) ..................................................... 199
and Control) ..................................................... 219
and Control) ..................................................... 198
and Control) ..................................................... 218
Managed Modes ................................................ 51
Reset (BOR) ...................................................... 51
2
C Mode) ....................... 167
2
2
C Mode) ................. 168
C Mode) ................. 169
Preliminary
SETF ................................................................................ 329
Slave Select (SS) ............................................................. 157
SLEEP ............................................................................. 330
Sleep
Software Enabled BOR ...................................................... 54
Software Simulator (MPLAB SIM) ................................... 346
Software Simulator (MPLAB SIM30) ............................... 346
Special Event Trigger.
Special Features of the CPU ........................................... 281
Special Function Registers ................................................ 74
SPI Mode (MSSP)
SS .................................................................................... 157
SSPOV ............................................................................ 187
SSPOV Status Flag ......................................................... 187
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 68
Status Register .................................................................. 80
SUBFSR .......................................................................... 341
SUBFWB ......................................................................... 330
SUBLW ............................................................................ 331
SUBULNK ........................................................................ 341
SUBWF ............................................................................ 331
SUBWFB ......................................................................... 332
SWAPF ............................................................................ 332
T
Table Pointer Operations (table) ........................................ 88
Table Reads ...................................................................... 68
TBLRD ............................................................................. 333
TBLWT ............................................................................. 334
Time-out in Various Situations (table) ................................ 55
Timer0 .............................................................................. 131
OSC1 and OSC2 Pin States ...................................... 39
See Compare (CCP Module).
Map ...................................................................... 74–75
Associated Registers ............................................... 165
Bus Mode Compatibility ........................................... 165
Effects of a Reset .................................................... 165
Enabling SPI I/O ...................................................... 161
Master Mode ............................................................ 162
Master/Slave Connection ......................................... 161
Operation ................................................................. 160
Serial Clock .............................................................. 157
Serial Data In ........................................................... 157
Serial Data Out ........................................................ 157
Slave Mode .............................................................. 163
Slave Select ............................................................. 157
Slave Select Synchronization .................................. 163
Sleep Operation ....................................................... 165
SPI Clock ................................................................. 162
Typical Connection .................................................. 161
R/W Bit ............................................................ 170, 171
16-Bit Mode Timer Reads
Associated Registers ............................................... 133
Clock Source Edge Select
Clock Source Select (T0CS Bit) ............................... 132
Operation ................................................................. 132
Overflow Interrupt .................................................... 133
Prescaler. See Prescaler, Timer0.
and Writes ....................................................... 132
(T0SE Bit) ........................................................ 132
 2004 Microchip Technology Inc.