DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 201

IC DSPIC MCU/DSP 24K 18SOIC

DSPIC30F3012-20I/SO

Manufacturer Part Number
DSPIC30F3012-20I/SO
Description
IC DSPIC MCU/DSP 24K 18SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301220ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3012-20I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F3012-20I/SO
0
Timing Specifications
Trap Vectors ....................................................................... 69
U
UART Module
UART Operation
Unit ID Locations............................................................... 121
Universal Asynchronous Receiver Transmitter (UART) Mod-
W
Wake-up from Sleep ......................................................... 121
Wake-up from Sleep and Idle ............................................. 70
Watchdog Timer
Watchdog Timer (WDT) ............................................ 121, 131
WWW Address.................................................................. 200
WWW, On-Line Support ..................................................... 10
© 2008 Microchip Technology Inc.
Input Capture ............................................................ 167
Oscillator Start-up Timer ........................................... 163
Output Compare Module........................................... 168
Power-up Timer ........................................................ 163
Reset......................................................................... 163
Simple OC/PWM Mode............................................. 169
SPI Module
Type A Timer External Clock .................................... 165
Type B Timer External Clock .................................... 166
Type C Timer External Clock .................................... 166
Watchdog Timer........................................................ 163
PLL Clock.................................................................. 159
Address Detect Mode ............................................... 107
Auto-Baud Support ................................................... 108
Baud Rate Generator................................................ 107
Enabling and Setting Up ........................................... 105
Framing Error (FERR)............................................... 107
Idle Status ................................................................. 107
Loopback Mode ........................................................ 107
Operation During CPU Sleep and Idle Modes .......... 108
Overview ................................................................... 103
Parity Error (PERR) .................................................. 107
Receive Break........................................................... 107
Receive Buffer (UxRXB) ........................................... 106
Receive Buffer Overrun Error (OERR Bit) ................ 106
Receive Interrupt....................................................... 106
Receiving Data.......................................................... 106
Receiving in 8-bit or 9-bit Data Mode........................ 106
Reception Error Handling.......................................... 106
Transmit Break.......................................................... 106
Transmit Buffer (UxTXB)........................................... 105
Transmit Interrupt...................................................... 106
Transmitting Data...................................................... 105
Transmitting in 8-bit Data Mode................................ 105
Transmitting in 9-bit Data Mode................................ 105
UART1 Register Map................................................ 109
UART2 Register Map................................................ 109
Idle Mode .................................................................. 108
Sleep Mode............................................................... 108
ule ............................................................................. 103
Timing Characteristics .............................................. 163
Timing Requirements................................................ 163
Enabling and Disabling ............................................. 131
Operation .................................................................. 131
Master Mode (CKE = 0) .................................... 170
Master Mode (CKE = 1) .................................... 171
Slave Mode (CKE = 0) ...................................... 172
Slave Mode (CKE = 1) ...................................... 174
dsPIC30F2011/2012/3012/3013
DS70139F-page 201

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