DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 7
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DSPIC30F3012-20I/SO
Manufacturer Part Number
DSPIC30F3012-20I/SO
Description
IC DSPIC MCU/DSP 24K 18SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(210 pages)
2.DSPIC30F2011-20ISO.pdf
(6 pages)
3.DSPIC30F3012-20ISO.pdf
(14 pages)
4.DSPIC30F3012-20ISO.pdf
(20 pages)
5.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F3012-20I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301220ISO
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3012-20I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
9. Module: INT0, ADC and Sleep Mode
10. Module: 4x and 8x PLL Mode
© 2008 Microchip Technology Inc.
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero. This means that if the ADC is
configured to generate an interrupt after a certain
number of INT0 triggered conversions, the ADC
conversions will not be triggered and the device
will remain in Sleep. The ADC will perform
conversions and wake-up the device only if it is
configured to generate an interrupt after each INT0
triggered conversion (SMPI<3:0> = 0000).
Work around
None. If ADC event trigger from the INT0 pin is
required, initialize SMPI<3:0> to ‘0000’ (interrupt
on every conversion).
If 4x or 8x PLL mode is used, the input frequency
range is 5 MHz-10 MHz instead of 4 MHz-10 MHz.
Work around
None. If 4x or 8x PLL mode is used, make sure the
input crystal or clock frequency is 5 MHz or
greater.
11. Module: Sleep Mode
dsPIC30F3012/3013
Execution of the Sleep instruction (PWRSAV #0)
may cause incorrect program operation after the
device wakes up from Sleep. The current
consumption during Sleep may also increase
beyond the specifications listed in the device data
sheet.
Work arounds
To avoid this issue, any of the following three work
arounds can be implemented, depending on the
application requirements.
Work around 1:
Ensure that the PWRSAV #0 instruction is located
at the end of the last row of program Flash memory
available on the target device and fill the
remainder of the row with NOP instructions.
This can be accomplished by replacing all
occurrences of the PWRSAV #0 instruction with a
function call to a suitably aligned subroutine. The
address( ) attribute provided by the MPLAB
ASM30 assembler can be utilized to correctly align
the instructions in the subroutine. For an
application written in C, the function call would be
GotoSleep( ), while for an assembly language
application,
CALL _GotoSleep.
The address error trap service routine software
can then replace the invalid return address saved
on the stack with the address of the instruction
immediately
GotoSleep( ) function call. This ensures that
the device continues executing the correct code
sequence after waking up from Sleep mode.
Example 8
described above, as it would apply to a
dsPIC30F3012 device.
demonstrates
the
following
function
the
the
_GotoSleep
call
DS80255F-page 7
work
would
around
be
or