DSPIC30F2010-30I/MM Microchip Technology, DSPIC30F2010-30I/MM Datasheet - Page 15

• Manufacturer Part Number: DSPIC30F2010-30I/MM
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 28QFN-S EP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F2010-30I/MMG; DSPIC30F201030IMM; DSPIC30F201030IMM

dsPIC30F2010
APPENDIX A:
REVISION HISTORY
Revision A (4/2004)
Original version of the document.
Revision B (11/2004)
Added silicon issues 3 and 4.
Revision C (12/2004)
Removed “Reset during Run-Time Self Programming
(RTSP) of Program Flash Memory” – issue does not
occur on this revision of silicon. Added silicon issue 7.
Revision D (3/2005)
Added silicon issues 8 and 9.
Revision E (10/2006)
Added silicon issues 2, 3, 7, 9, 10, 12 and 16.
Revision F (8/2007)
Added silicon issues 17 (SPI), 18 (QEI Interrupt
Generation),
and
19
(Sleep
Mode).
Removed
document status.
Revision G (12/2007)
Updated silicon issue 4 (PSV Operations Using SR),
2
and added silicon issues 20 and 21 (I
C), 22 (Motor
Control PWM – PWM Counter Register), 23 (I/O Port –
Port Pin Multiplexed with IC1), and 24 (FRC).
Revision H (5/2008)
2
Added silicon issues 25 and 26 (I
C), and 27 (Timer).
Revision J (9/2008)
2
2
Replaced issues 20 and 25 (I
C) with issue 30 (I
C).
Added silicon issues 26 (PLL Lock Status Bit), 27 (PSV
2
Operations) and 28-30 (I
C).
© 2008 Microchip Technology Inc.
DS80186J-page 15