PIC18F67J11-I/PT Microchip Technology, PIC18F67J11-I/PT Datasheet - Page 3
![IC PIC MCU FLASH 64KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J11-I/PT
Manufacturer Part Number
PIC18F67J11-I/PT
Description
IC PIC MCU FLASH 64KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F66J11-IPT.pdf
(4 pages)
6.PIC18F66J11-IPT.pdf
(4 pages)
7.PIC18F66J11-IPT.pdf
(20 pages)
Specifications of PIC18F67J11-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F67J11-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
Silicon Errata Issues
1. Module: Master Synchronous Serial Port
2. Module: Oscillator Configurations (PLL)
2011 Microchip Technology Inc.
Note:
When configured for I
MSSPx module may not receive the correct data, in
extremely rare cases. This occurs only if the Serial
Receive/Transmit Buffer Register (SSPxBUF) is
not read within a window after the SSPxIF interrupt
(PIRx<3>) has occurred.
Work around
The issue can be resolved in either of these ways:
• Prior to the I
• Each time the SSPxIF is set, read the
Affected Silicon Revisions
When Phase Lock Loop (PLL) is enabled, if the
PLL input frequency is higher than 8 MHz, there
may be problems accessing the RAM.
Work around
Limit the PLL input frequency from 4 MHz to
8 MHz. This will cause the system clock to
operate from 16 MHz to 32 MHz.
If it is necessary to run the device above
32 MHz, do not enable PLL and use the EC
mode.
Affected Silicon Revisions
A1
A1
clock stretching feature.
This
(SSPxCON2<0>).
SSPxBUF before the first rising clock edge of
the next byte being received.
X
X
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A6).
A2
A2
X
X
is
(MSSPx)
done
A4
A4
2
X
C slave reception, enable the
A5
A5
by
X
2
C™ slave reception, the
setting
A6
A6
X
C1
C1
X
the
SEN
bit
PIC18F87J11 FAMILY
3. Module: Voltage Regulator
If V
while the on-chip core voltage regulator is
enabled, and operating in Voltage Tracking
mode, the REGSLP bit (WDTCON <7>) will be
automatically cleared. The REGSLP bit cannot
be set again by firmware until V
back above the 2.45V approximate threshold.
Additionally, the REGSLP bit retains its previous
state upon all Resets except POR.
Work around
None.
Affected Silicon Revisions
A1
X
DDCORE
A2
drops below approximately 2.45V
A4
A5
A6
C1
DS80495D-page 3
DDCORE
rises