PIC16F88-I/ML Microchip Technology, PIC16F88-I/ML Datasheet - Page 537

IC MCU FLASH 4KX14 EEPROM 28QFN

PIC16F88-I/ML

Manufacturer Part Number
PIC16F88-I/ML
Description
IC MCU FLASH 4KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F88-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
1997 Microchip Technology Inc.
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip (2nd cycle):
Example 1
Q1
Q1
operation
Case 1:
Case 2:
Decode
No
Q2
Q2
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '1' then the next instruction is skipped.
If bit 'b' is '1', then the next instruction (fetched during the current instruc-
tion execution) is discarded and a NOP is executed instead, making this a
2 cycle instruction.
1
1(2)
Before Instruction
After Instruction
Before Instruction
After Instruction
register 'f'
operation
HERE
FALSE
TRUE
Read
01
No
f
b < 7
Section 29. Instruction Set
127
PC =
FLAG=
Since FLAG<4>= 0,
PC =
PC =
FLAG=
Since FLAG<4>=1,
PC =
Bit Test f, Skip if Set
BTFSS
GOTO
11bb
Q3
Q3
operation
Process
data
No
addressHERE
xxx0 xxxx
addressFALSE
addressHERE
xxx1 xxxx
addressTRUE
FLAG, 4
PROCESS_CODE
bfff
Q4
Q4
operation
operation
No
No
ffff
DS31029A-page 29-15
29

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